From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Mon, 28 Sep 2020 16:33:57 +0000 (+0100)
Subject: dev-arm: Automate FdtProperty generation with ArmInterruptPin
X-Git-Tag: develop-gem5-snapshot~607
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=328880aaa9f9504dcfa47b23cbc15c6fb30d5ca6;p=gem5.git

dev-arm: Automate FdtProperty generation with ArmInterruptPin

Change-Id: I1963bd139d8abd8988d5ceedaf85c74279546078
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35396
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/dev/arm/Gic.py b/src/dev/arm/Gic.py
index 987a6e0ab..a24256c27 100644
--- a/src/dev/arm/Gic.py
+++ b/src/dev/arm/Gic.py
@@ -110,6 +110,16 @@ class ArmSPI(ArmInterruptPin):
 
     _LINUX_ID = 0
 
+    def generateFdtProperty(self, gic):
+        """
+        Return a list used as an entry for an interrupt FdtProperty
+
+        Subtracting 32 because Linux assumes that SPIs start at 0, while
+        gem5 uses the internal GIC numbering (SPIs start at 32)
+        """
+        return gic.interruptCells(
+            self._LINUX_ID, self.num - 32, int(self.int_type.getValue()))
+
 class ArmPPI(ArmInterruptPin):
     type = 'ArmPPI'
     cxx_header = "dev/arm/base_gic.hh"
@@ -117,6 +127,16 @@ class ArmPPI(ArmInterruptPin):
 
     _LINUX_ID = 1
 
+    def generateFdtProperty(self, gic):
+        """
+        Return a list used as an entry for an interrupt FdtProperty
+
+        Subtracting 16 because Linux assumes that PPIs start at 0, while
+        gem5 uses the internal GIC numbering (PPIs start at 16)
+        """
+        return gic.interruptCells(
+            self._LINUX_ID, self.num - 16, int(self.int_type.getValue()))
+
 class GicV2(BaseGic):
     type = 'GicV2'
     cxx_header = "dev/arm/gic_v2.hh"