From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 29 Sep 2018 02:14:15 +0000 (+0100)
Subject: whoops dont need separate SVSETVL/SVGETVL CSRs
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=32c0f26872c2ff705345b807d8353c8a3d46209d;p=riscv-isa-sim.git

whoops dont need separate SVSETVL/SVGETVL CSRs

also add SVREALVL which is needed for state context save/restore
---

diff --git a/riscv/encoding.h b/riscv/encoding.h
index 02b22a5..f06e785 100644
--- a/riscv/encoding.h
+++ b/riscv/encoding.h
@@ -892,10 +892,9 @@
 #define CSR_MHPMEVENT29 0x33d
 #define CSR_MHPMEVENT30 0x33e
 #define CSR_MHPMEVENT31 0x33f
-#define CSR_SVGETVL 0xcf0
-#define CSR_SVSETVL 0xcf1
-#define CSR_SVGETMVL 0xcf2
-#define CSR_SVSETMVL 0xcf3
+#define CSR_SVVL 0xcf0
+#define CSR_SVREALVL 0xcf1
+#define CSR_SVMVL 0xcf2
 #define CSR_MVENDORID 0xf11
 #define CSR_MARCHID 0xf12
 #define CSR_MIMPID 0xf13
@@ -1244,10 +1243,9 @@ DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1)
 DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2)
 #endif
 #ifdef DECLARE_CSR
-DECLARE_CSR(svsetvl, CSR_SVSETVL)
-DECLARE_CSR(svgetvl, CSR_SVGETVL)
-DECLARE_CSR(svsetmvl, CSR_SVSETMVL)
-DECLARE_CSR(svgetmvl, CSR_SVGETMVL)
+DECLARE_CSR(svvl, CSR_SVVL)
+DECLARE_CSR(svrealvl, CSR_SVREALVL)
+DECLARE_CSR(svmvl, CSR_SVMVL)
 DECLARE_CSR(fflags, CSR_FFLAGS)
 DECLARE_CSR(frm, CSR_FRM)
 DECLARE_CSR(fcsr, CSR_FCSR)
diff --git a/riscv/insns/csrrw.h b/riscv/insns/csrrw.h
index b7911f5..3d83b09 100644
--- a/riscv/insns/csrrw.h
+++ b/riscv/insns/csrrw.h
@@ -1,12 +1,12 @@
 int csr = validate_csr(insn.csr(), true);
 #ifdef SPIKE_SIMPLEV
 reg_t old;
-if (csr != CSR_SVSETVL)
+if (csr != CSR_SVVL)
 {
     old = p->get_csr(csr);
 }
 p->set_csr(csr, RS1);
-if (csr == CSR_SVSETVL)
+if (csr == CSR_SVVL)
 {
     old = p->get_csr(csr);
 }
diff --git a/riscv/processor.cc b/riscv/processor.cc
index 603aaf6..83c6439 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -336,10 +336,13 @@ void processor_t::set_csr(int which, reg_t val)
   switch (which)
   {
 #ifdef SPIKE_SIMPLEV
-    case CSR_SVSETMVL:
+    case CSR_SVMVL:
       state.mvl = std::min(val, (uint64_t)63); // limited to XLEN width
       break;
-    case CSR_SVSETVL:
+    case CSR_SVREALVL:
+      state.vl = std::min(val, state.mvl); // limited to MVL
+      break;
+    case CSR_SVVL:
       state.vl = std::min(state.mvl, state.XPR[val]);
       state.XPR.write(val, state.vl);
       break;
@@ -568,9 +571,10 @@ reg_t processor_t::get_csr(int which)
   switch (which)
   {
 #ifdef SPIKE_SIMPLEV
-    case CSR_SVGETVL:
+    case CSR_SVVL:
+    case CSR_SVREALVL:
       return state.vl;
-    case CSR_SVGETMVL:
+    case CSR_SVMVL:
       return state.mvl;
 #endif
     case CSR_FFLAGS: