From: Paul Berry Date: Wed, 29 Aug 2012 19:04:30 +0000 (-0700) Subject: i965/blorp: Clarify why width/height must be adjusted for Gen6 IMS surfaces. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=32c7b2769cbe80ff56d1c73c4f9b62f13f577c8d;p=mesa.git i965/blorp: Clarify why width/height must be adjusted for Gen6 IMS surfaces. Also add a clarifying comment for why the width/height doesn't need adjustment for Gen7. NOTE: This is a candidate for stable release branches. Reviewed-by: Eric Anholt --- diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 995b50781a2..8a22fe32d7e 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -415,7 +415,11 @@ gen6_blorp_emit_surface_state(struct brw_context *brw, uint32_t wm_surf_offset; uint32_t width, height; surface->get_miplevel_dims(&width, &height); - if (surface->num_samples > 1) { /* TODO: seems clumsy */ + if (surface->num_samples > 1) { + /* Since gen6 uses INTEL_MSAA_LAYOUT_IMS, width and height are measured + * in samples. But SURFACE_STATE wants them in pixels, so we need to + * divide them each by 2. + */ width /= 2; height /= 2; } diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index a65a975ed12..e23868ddead 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -144,6 +144,11 @@ gen7_blorp_emit_surface_state(struct brw_context *brw, uint32_t wm_surf_offset; uint32_t width, height; surface->get_miplevel_dims(&width, &height); + /* Note: since gen7 uses INTEL_MSAA_LAYOUT_CMS or INTEL_MSAA_LAYOUT_UMS for + * color surfaces, width and height are measured in pixels; we don't need + * to divide them by 2 as we do for Gen6 (see + * gen6_blorp_emit_surface_state). + */ if (surface->map_stencil_as_y_tiled) { width *= 2; height /= 2;