From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 20 May 2018 11:33:07 +0000 (+0100)
Subject: update slides
X-Git-Tag: convert-csv-opcode-to-binary~5353
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=32d608d2d85a212bb15d1413e17e7def4f05d2c0;p=libreriscv.git

update slides
---

diff --git a/simple_v_extension/simple_v_chennai_2018.tex b/simple_v_extension/simple_v_chennai_2018.tex
index f419ffdcc..34bda04e6 100644
--- a/simple_v_extension/simple_v_chennai_2018.tex
+++ b/simple_v_extension/simple_v_chennai_2018.tex
@@ -16,7 +16,7 @@
     \Large{Flexible Vectorisation}\\
     \Large{(aka not so Simple-V?)}\\
     \vspace{24pt}
-    \Large{Chennai 9th RISC-V Workshop}\\
+    \Large{[proposed for] Chennai 9th RISC-V Workshop}\\
     \vspace{24pt}
     \large{\today}
   \end{center}
@@ -131,6 +131,7 @@
   \end{itemize}
 }
 
+
 \frame{\frametitle{Why are overlaps allowed in Regfiles?}
 
  \begin{itemize}