From: lkcl <lkcl@web>
Date: Sun, 1 Sep 2019 17:24:03 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~4172
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=32e715475926765b3e027569146a51998132fd0f;p=libreriscv.git

---

diff --git a/simple_v_extension/vblock_format/discussion.mdwn b/simple_v_extension/vblock_format/discussion.mdwn
index c6949ee59..5b6bfbd4f 100644
--- a/simple_v_extension/vblock_format/discussion.mdwn
+++ b/simple_v_extension/vblock_format/discussion.mdwn
@@ -17,9 +17,9 @@ explicit naming of the registers to be tagged (taking up 5 bits each time).
 | SVPMode  | 1:0  |
 | -------  | ---  |
 | non-SVP  | 0b00 |
-| P48 Mode | 0b00 |
-| P64 Mode | 0b00 |
-| Twin-SVP | 0b00 |
+| P48 Mode | 0b01 |
+| P64 Mode | 0b10 |
+| Twin-SVP | 0b11 |
 
 non-SVP mode uses the extended format (see main VBLOCK spec [[vblock_format]])