From: lkcl <lkcl@web>
Date: Mon, 4 Jul 2022 08:25:05 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1374
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=32ffb922940c95febffc19996b1ed1faa51611f2;p=libreriscv.git

---

diff --git a/3d_gpu/layouts/coriolis2_180nm.mdwn b/3d_gpu/layouts/coriolis2_180nm.mdwn
index 2547eb116..043080bea 100644
--- a/3d_gpu/layouts/coriolis2_180nm.mdwn
+++ b/3d_gpu/layouts/coriolis2_180nm.mdwn
@@ -49,3 +49,12 @@ simple core FSM from the Instruction Cache.  Currently this is an
 extremely simple memory block, to be replaced by a proper I-Cache
 with a proper connection to the Memory Bus (wishbone).
 
+# Building
+
+To build see [[HDL_workflow/coriolis2]]. A tag has been used and the
+build instructions specify it.  The soclayout repository is standalone,
+containing a snapshot of the verilog autogenerated output.
+
+# About coriolis2
+
+There are several talks online now.