From: Luke Kenneth Casson Leighton Date: Sun, 4 Nov 2018 16:18:06 +0000 (+0000) Subject: debug shape remap X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=334adac89a4230407041e51ced1733cd13c30e0c;p=riscv-isa-sim.git debug shape remap --- diff --git a/riscv/processor.cc b/riscv/processor.cc index 37b762a..66a11fd 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -165,7 +165,7 @@ void sv_shape_t::setup_map() if (idxs[order[j]] != lims[order[j]]) { break; } - idxs[order[i]] = 0; + idxs[order[j]] = 0; } } } @@ -559,14 +559,21 @@ void processor_t::set_csr(int which, reg_t val) case CSR_USHAPE2: { int shapeidx = which - CSR_USHAPE0; - state.shape[shapeidx].xsz = get_field(val, SV_SHAPE_XDIM); - state.shape[shapeidx].ysz = get_field(val, SV_SHAPE_YDIM); - state.shape[shapeidx].zsz = get_field(val, SV_SHAPE_ZDIM); + state.shape[shapeidx].xsz = get_field(val, SV_SHAPE_XDIM) + 1; + state.shape[shapeidx].ysz = get_field(val, SV_SHAPE_YDIM) + 1; + state.shape[shapeidx].zsz = get_field(val, SV_SHAPE_ZDIM) + 1; state.shape[shapeidx].offs = (get_field(val, (1<<7 )) ? 0x1 : 0) | (get_field(val, (1<<15)) ? 0x2 : 0) | (get_field(val, (1<<23)) ? 0x4 : 0); state.shape[shapeidx].permute = get_field(val, SV_SHAPE_PERM); state.shape[shapeidx].setup_map(); + fprintf(stderr, "sv shape %d x %d y %d z %d offs %d perm %d\n", + shapeidx, + state.shape[shapeidx].xsz, + state.shape[shapeidx].ysz, + state.shape[shapeidx].zsz, + state.shape[shapeidx].offs, + state.shape[shapeidx].permute); break; } #endif diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index eacf96d..0664f58 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -129,7 +129,10 @@ unsigned int sv_proc_t::remap(reg_spec_t const& spec) // changing the CSRs is the way to change the map. // the map is still calculated even for the 1D case // because it's a linear map - return (unsigned int)shape->map[offs] + shape->offs; + unsigned int res = (unsigned int)shape->map[offs] + shape->offs; + fprintf(stderr, "remap %d %d -> %d\n", + spec.reg, offs, res); + return res; } void (sv_proc_t::DO_WRITE_FREG)(reg_spec_t const& spec, sv_freg_t const& value) @@ -265,8 +268,8 @@ freg_t (sv_proc_t::READ_FREG)(reg_spec_t const& spec) } freg_shift fs; fs.f = _insn->p->get_state()->FPR[reg]; - fprintf(stderr, "READ_FREG rd %ld ew %d bw %d fl %d data %lx %lx\n", - reg, elwidth, bitwidth, flen, fs.f.v[0], fs.f.v[1]); + fprintf(stderr, "READ_FREG rd %ld offs %d ew %d bw %d fl %d data %lx %lx\n", + reg, offs, elwidth, bitwidth, flen, fs.f.v[0], fs.f.v[1]); if (regflen != bitwidth) {