From: lkcl Date: Sat, 19 Dec 2020 21:32:07 +0000 (+0000) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~1159 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=338ea8b7aed7a081bb35153abb31c525af0592a8;p=libreriscv.git --- diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn index 25daa1814..fc46aa603 100644 --- a/openpower/sv/svp_rewrite/svp64.mdwn +++ b/openpower/sv/svp_rewrite/svp64.mdwn @@ -255,9 +255,12 @@ Mode types: ### Notes about rounding, clamp and saturate +When N=0 the result is saturated to within the maximum range of an unsigned value. For integer ops this will be 0 to 2^elwidth-1. Similar logic applies to FP operations, with the result being saturated to maximum rather than returning INF. + +When N=1 the same occurs except that the result is saturated to the min or max of a signed result. + One of the issues with vector ops is that in integer DSP ops for example in Audio the operation must clamp or saturate rather than overflow or ignore the upper bits and become a modulo operation. This for Audio is extremely important, also to provide an indicator as to whether saturation occurred. see [[av_opcodes]]. -If there are spare bits it would be very good to look at using some of them to specify the mode, because otherwise a SPR has to be used which will need to be set and unset. This can get costly. ### Notes about reduce mode