From: Luke Kenneth Casson Leighton Date: Thu, 28 Jul 2022 10:37:08 +0000 (+0100) Subject: update estimates for SVP64 intrinsics X-Git-Tag: opf_rfc_ls005_v1~981 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=34c416ce891a079a689911c27cfe9b2a9e1874f6;p=libreriscv.git update estimates for SVP64 intrinsics --- diff --git a/openpower/sv/comparison_table.mdwn b/openpower/sv/comparison_table.mdwn index 0b94dc044..f0fc0015d 100644 --- a/openpower/sv/comparison_table.mdwn +++ b/openpower/sv/comparison_table.mdwn @@ -39,8 +39,8 @@ * (22): [NEC SX Aurora](https://ftp.libre-soc.org/NEC_SX_Aurora_TSUBASA_VectorEngine-as-manual-v1.2.pdf) is based on the original Cray Vectors * (23): [Aurora ISA guide](https://sxauroratsubasa.sakura.ne.jp/documents/guide/pdfs/Aurora_ISA_guide.pdf) Appendix-3 11.1 p508 * (24): Like the original Cray Vectors, the ISA Vector Length is independent of the underlying hardware, however Generation 1 has 256 elements per Vector register (3.2.4 p24, Aurora ISA guide) -* (25): If treated as a 1-Dimensional ISA, the 24-bit Prefix expands 200+ scalar instructions to well over a million intrinsics (N **times** M). - If treated as a 2-Dimensional ISA there are far less. N prefix intrinsics **plus** M scalar instruction intrinsics, where N is of the order of 10^4 and M is of the order of 10^2. +* (25): If treated as a 1-Dimensional ISA, and designed badly, the 24-bit Prefix expands 200+ scalar instructions to well over a million intrinsics (N=10^4 **times** M=10^2). + If treated as a 2-Dimensional ISA and designed well, there are far less. N prefix intrinsics **plus** M scalar instruction intrinsics, where N is likely to be of the order of 10^2 and M of the order of 10^2. * (26): [Altivec gcc intrinsics](https://gcc.gnu.org/onlinedocs/gcc/PowerPC-AltiVec_002fVSX-Built-in-Functions.html), contains links to additional VSX intrinsics for ISA 2.05/6/7, 3.0 and 3.1 * (27): NEON 32-bit 2754 intrinsics, NEON 64-bit 4334 intrinsics. * (28): SVE: 4140 intrinsics, SVE2 1900 intrinsics