From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Mon, 21 Sep 2015 13:19:58 +0000 (+0800)
Subject: verilog: remove unneeded import
X-Git-Tag: 24jan2021_ls180~2099^2~3^2~55
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=34ce6b077f4e3bdcc1519b441b3dc437f8060a33;p=litex.git

verilog: remove unneeded import
---

diff --git a/migen/fhdl/verilog.py b/migen/fhdl/verilog.py
index 009c7e1f..d5d878c9 100644
--- a/migen/fhdl/verilog.py
+++ b/migen/fhdl/verilog.py
@@ -5,7 +5,7 @@ from migen.fhdl.structure import *
 from migen.fhdl.structure import _Operator, _Slice, _Assign, _Fragment
 from migen.fhdl.tools import *
 from migen.fhdl.bitcontainer import bits_for, flen
-from migen.fhdl.namer import Namespace, build_namespace
+from migen.fhdl.namer import build_namespace
 from migen.fhdl.conv_output import ConvOutput