From: Richard Sandiford Date: Tue, 31 Aug 2004 06:54:42 +0000 (+0000) Subject: mips.md (fcond): New code macro and attribute. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=34ebf75508568c73a883895e29deced5b4505ff5;p=gcc.git mips.md (fcond): New code macro and attribute. * config/mips/mips.md (fcond): New code macro and attribute. (sunordered_[sd]f, suneq_[sd]f, sunlt_[sd]f, sunle_[sd]f) (seq_[sd]f, slt_[sd]f, sle_[sd]f): Redefine using :SCALARF and fcond. (sgt_[sd]f, sge_[sd]f): Redefine using :SCALARF. From-SVN: r86821 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 18a373d5b89..99dbaf7fc42 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2004-08-31 Richard Sandiford + + * config/mips/mips.md (fcond): New code macro and attribute. + (sunordered_[sd]f, suneq_[sd]f, sunlt_[sd]f, sunle_[sd]f) + (seq_[sd]f, slt_[sd]f, sle_[sd]f): Redefine using :SCALARF and fcond. + (sgt_[sd]f, sge_[sd]f): Redefine using :SCALARF. + 2004-08-30 Mark Mitchell Revert: diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 037ee042e9b..7fa4b08fa85 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -381,6 +381,10 @@ ;; from the same template. (define_code_macro any_shift [ashift ashiftrt lshiftrt]) +;; This code macro allows all native floating-point comparisons to be +;; generated from the same template. +(define_code_macro fcond [unordered uneq unlt unle eq lt le]) + ;; expands to an empty string when doing a signed operation and ;; "u" when doing an unsigned operation. (define_code_attr u [(sign_extend "") (zero_extend "u")]) @@ -397,6 +401,15 @@ (define_code_attr insn [(ashift "sll") (ashiftrt "sra") (lshiftrt "srl")]) + +;; is the c.cond.fmt condition associated with a particular code. +(define_code_attr fcond [(unordered "un") + (uneq "ueq") + (unlt "ult") + (unle "ule") + (eq "eq") + (lt "lt") + (le "le")]) ;; ......................... ;; @@ -4731,165 +4744,30 @@ beq\t%2,%.,1b\;\ ;; ;; .................... -(define_insn "sunordered_df" - [(set (match_operand:CC 0 "register_operand" "=z") - (unordered:CC (match_operand:DF 1 "register_operand" "f") - (match_operand:DF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" - "c.un.d\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "sunlt_df" - [(set (match_operand:CC 0 "register_operand" "=z") - (unlt:CC (match_operand:DF 1 "register_operand" "f") - (match_operand:DF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" - "c.ult.d\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "suneq_df" - [(set (match_operand:CC 0 "register_operand" "=z") - (uneq:CC (match_operand:DF 1 "register_operand" "f") - (match_operand:DF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" - "c.ueq.d\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "sunle_df" - [(set (match_operand:CC 0 "register_operand" "=z") - (unle:CC (match_operand:DF 1 "register_operand" "f") - (match_operand:DF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" - "c.ule.d\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "seq_df" - [(set (match_operand:CC 0 "register_operand" "=z") - (eq:CC (match_operand:DF 1 "register_operand" "f") - (match_operand:DF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" - "c.eq.d\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "slt_df" - [(set (match_operand:CC 0 "register_operand" "=z") - (lt:CC (match_operand:DF 1 "register_operand" "f") - (match_operand:DF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" - "c.lt.d\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "sle_df" - [(set (match_operand:CC 0 "register_operand" "=z") - (le:CC (match_operand:DF 1 "register_operand" "f") - (match_operand:DF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" - "c.le.d\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "sgt_df" - [(set (match_operand:CC 0 "register_operand" "=z") - (gt:CC (match_operand:DF 1 "register_operand" "f") - (match_operand:DF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" - "c.lt.d\t%Z0%2,%1" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "sge_df" +(define_insn "s_" [(set (match_operand:CC 0 "register_operand" "=z") - (ge:CC (match_operand:DF 1 "register_operand" "f") - (match_operand:DF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" - "c.le.d\t%Z0%2,%1" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "sunordered_sf" - [(set (match_operand:CC 0 "register_operand" "=z") - (unordered:CC (match_operand:SF 1 "register_operand" "f") - (match_operand:SF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT" - "c.un.s\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "sunlt_sf" - [(set (match_operand:CC 0 "register_operand" "=z") - (unlt:CC (match_operand:SF 1 "register_operand" "f") - (match_operand:SF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT" - "c.ult.s\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "suneq_sf" - [(set (match_operand:CC 0 "register_operand" "=z") - (uneq:CC (match_operand:SF 1 "register_operand" "f") - (match_operand:SF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT" - "c.ueq.s\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "sunle_sf" - [(set (match_operand:CC 0 "register_operand" "=z") - (unle:CC (match_operand:SF 1 "register_operand" "f") - (match_operand:SF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT" - "c.ule.s\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "seq_sf" - [(set (match_operand:CC 0 "register_operand" "=z") - (eq:CC (match_operand:SF 1 "register_operand" "f") - (match_operand:SF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT" - "c.eq.s\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "slt_sf" - [(set (match_operand:CC 0 "register_operand" "=z") - (lt:CC (match_operand:SF 1 "register_operand" "f") - (match_operand:SF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT" - "c.lt.s\t%Z0%1,%2" - [(set_attr "type" "fcmp") - (set_attr "mode" "FPSW")]) - -(define_insn "sle_sf" - [(set (match_operand:CC 0 "register_operand" "=z") - (le:CC (match_operand:SF 1 "register_operand" "f") - (match_operand:SF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT" - "c.le.s\t%Z0%1,%2" + (fcond:CC (match_operand:SCALARF 1 "register_operand" "f") + (match_operand:SCALARF 2 "register_operand" "f")))] + "" + "c..\t%Z0%1,%2" [(set_attr "type" "fcmp") (set_attr "mode" "FPSW")]) -(define_insn "sgt_sf" +(define_insn "sgt_" [(set (match_operand:CC 0 "register_operand" "=z") - (gt:CC (match_operand:SF 1 "register_operand" "f") - (match_operand:SF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT" - "c.lt.s\t%Z0%2,%1" + (gt:CC (match_operand:SCALARF 1 "register_operand" "f") + (match_operand:SCALARF 2 "register_operand" "f")))] + "" + "c.lt.\t%Z0%2,%1" [(set_attr "type" "fcmp") (set_attr "mode" "FPSW")]) -(define_insn "sge_sf" +(define_insn "sge_" [(set (match_operand:CC 0 "register_operand" "=z") - (ge:CC (match_operand:SF 1 "register_operand" "f") - (match_operand:SF 2 "register_operand" "f")))] - "TARGET_HARD_FLOAT" - "c.le.s\t%Z0%2,%1" + (ge:CC (match_operand:SCALARF 1 "register_operand" "f") + (match_operand:SCALARF 2 "register_operand" "f")))] + "" + "c.le.\t%Z0%2,%1" [(set_attr "type" "fcmp") (set_attr "mode" "FPSW")])