From: Raptor Engineering Development Team <support@raptorengineering.com>
Date: Mon, 28 Mar 2022 15:58:23 +0000 (-0500)
Subject: Fix instructions in comment
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=34f12c774c39152f56997a49ee90367f25f03d16;p=ls2.git

Fix instructions in comment
---

diff --git a/src/ls2.py b/src/ls2.py
index 21a71fa..235caf8 100644
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -513,7 +513,7 @@ class DDR3SoC(SoC, Elaboratable):
 
         if hasattr(self, "spi0"):
             # add Tercel verilog source. assumes a directory
-            # structure where ls2 has been checked out in a common
+            # structure where microwatt has been checked out in a common
             # subdirectory as https://git.libre-soc.org/git/microwatt.git
             raptor_tercel = "../../microwatt/tercel"
             pth = os.path.split(__file__)[0]