From: Eddie Hung Date: Fri, 20 Sep 2019 04:57:11 +0000 (-0700) Subject: Update doc for ice40_dsp X-Git-Tag: working-ls180~1039^2~69 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=34f9a8ceb285b6b59f24f994d3a877d5f4f09572;p=yosys.git Update doc for ice40_dsp --- diff --git a/passes/pmgen/ice40_dsp.cc b/passes/pmgen/ice40_dsp.cc index ed3577400..2d264a6d1 100644 --- a/passes/pmgen/ice40_dsp.cc +++ b/passes/pmgen/ice40_dsp.cc @@ -283,9 +283,18 @@ struct Ice40DspPass : public Pass { log("\n"); log(" ice40_dsp [options] [selection]\n"); log("\n"); - log("Map multipliers and multiply-accumulate blocks to iCE40 DSP resources.\n"); + log("Map multipliers ($mul/SB_MAC16) and multiply-accumulate ($mul/SB_MAC16 + $add)\n"); + log("cells into iCE40 DSP resources.\n"); log("Currently, only the 16x16 multiply mode is supported and not the 2 x 8x8 mode.\n"); log("\n"); + log("Pack input registers (A, B, {C,D}; with optional hold/reset), pipeline registers\n"); + log("({F,J,K,G}, H; with shared reset), output registers (O; with optional hold/reset),\n"); + log("and post-adder into the SB_MAC16 resource.\n"); + log("\n"); + log("Multiply-accumulate operations using the post-adder with feedback on the {C,D}\n"); + log("input will be folded into the DSP. In this scenario only, resetting the\n"); + log("the accumulator to an arbitrary value can be inferred to use the {C,D} input.\n"); + log("\n"); } void execute(std::vector args, RTLIL::Design *design) YS_OVERRIDE {