From: Alan Hayward Date: Tue, 25 Jun 2019 10:02:32 +0000 (+0100) Subject: Arm/AArch64: Use a single set of Arm register set size defines X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=350fab54163e2dd178609d268e80bf31042d182d;p=binutils-gdb.git Arm/AArch64: Use a single set of Arm register set size defines Both targets were using a mixture of defines and hardcoded values. Add a standard set in arch/arm.h and use throughout, ensuring that none of the existing sizes change. No functionality changes. gdb/ChangeLog: * aarch32-linux-nat.h (VFP_REGS_SIZE): Remove define. * aarch64-linux-nat.c (fetch_fpregs_from_thread) (store_fpregs_to_thread) (aarch64_linux_nat_target::read_description): Use ARM_VFP3_REGS_SIZE. * arch/arm.h (IWMMXT_VEC_REGISTER_SIZE, ARM_CORE_REGS_SIZE) (ARM_FP_REGS_SIZE, ARM_VFP2_REGS_SIZE, ARM_VFP3_REGS_SIZE) (IWMMXT_REGS_SIZE): Add define. * arm-linux-nat.c (IWMMXT_REGS_SIZE): Remove define. (fetch_vfp_regs, store_vfp_regs) (arm_linux_nat_target::read_description): Use ARM_VFP3_REGS_SIZE. * arm-tdep.c (arm_register_g_packet_guesses): Use new defines. gdb/gdbserver/ChangeLog: * linux-aarch32-low.c (arm_read_description, arm_regsets): Use new defines. * linux-arm-low.c (arm_read_description, arm_regsets): Likewise. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index d0523fbd2bc..483ab9b9628 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,17 @@ +2019-07-04 Alan Hayward + + * aarch32-linux-nat.h (VFP_REGS_SIZE): Remove define. + * aarch64-linux-nat.c (fetch_fpregs_from_thread) + (store_fpregs_to_thread) + (aarch64_linux_nat_target::read_description): Use ARM_VFP3_REGS_SIZE. + * arch/arm.h (IWMMXT_VEC_REGISTER_SIZE, ARM_CORE_REGS_SIZE) + (ARM_FP_REGS_SIZE, ARM_VFP2_REGS_SIZE, ARM_VFP3_REGS_SIZE) + (IWMMXT_REGS_SIZE): Add define. + * arm-linux-nat.c (IWMMXT_REGS_SIZE): Remove define. + (fetch_vfp_regs, store_vfp_regs) + (arm_linux_nat_target::read_description): Use ARM_VFP3_REGS_SIZE. + * arm-tdep.c (arm_register_g_packet_guesses): Use new defines. + 2019-07-04 Alan Hayward * arch/arm-get-next-pcs.c (thumb_get_next_pcs_raw): Use ARM_ diff --git a/gdb/aarch32-linux-nat.h b/gdb/aarch32-linux-nat.h index 093211c812a..e86593a8ad8 100644 --- a/gdb/aarch32-linux-nat.h +++ b/gdb/aarch32-linux-nat.h @@ -18,11 +18,6 @@ #ifndef AARCH32_LINUX_NAT_H #define AARCH32_LINUX_NAT_H -/* Fetch and store VFP Registers. The kernel object has space for 32 - 64-bit registers, and the FPSCR. This is even when on a VFPv2 or - VFPv3D16 target. */ -#define VFP_REGS_SIZE (32 * 8 + 4) - void aarch32_gp_regcache_supply (struct regcache *regcache, uint32_t *regs, int arm_apcs_32); diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index 8ca96143013..7b60a9a0c38 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -30,6 +30,7 @@ #include "aarch64-tdep.h" #include "aarch64-linux-tdep.h" #include "aarch32-linux-nat.h" +#include "arch/arm.h" #include "nat/aarch64-linux.h" #include "nat/aarch64-linux-hw-point.h" #include "nat/aarch64-sve-linux-ptrace.h" @@ -294,7 +295,7 @@ fetch_fpregs_from_thread (struct regcache *regcache) /* Make sure REGS can hold all VFP registers contents on both aarch64 and arm. */ - gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); + gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE); tid = regcache->ptid ().lwp (); @@ -302,7 +303,7 @@ fetch_fpregs_from_thread (struct regcache *regcache) if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) { - iovec.iov_len = VFP_REGS_SIZE; + iovec.iov_len = ARM_VFP3_REGS_SIZE; ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); if (ret < 0) @@ -341,14 +342,14 @@ store_fpregs_to_thread (const struct regcache *regcache) /* Make sure REGS can hold all VFP registers contents on both aarch64 and arm. */ - gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); + gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE); tid = regcache->ptid ().lwp (); iovec.iov_base = ®s; if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) { - iovec.iov_len = VFP_REGS_SIZE; + iovec.iov_len = ARM_VFP3_REGS_SIZE; ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); if (ret < 0) @@ -638,13 +639,13 @@ const struct target_desc * aarch64_linux_nat_target::read_description () { int ret, tid; - gdb_byte regbuf[VFP_REGS_SIZE]; + gdb_byte regbuf[ARM_VFP3_REGS_SIZE]; struct iovec iovec; tid = inferior_ptid.lwp (); iovec.iov_base = regbuf; - iovec.iov_len = VFP_REGS_SIZE; + iovec.iov_len = ARM_VFP3_REGS_SIZE; ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); if (ret == 0) diff --git a/gdb/arch/arm.h b/gdb/arch/arm.h index 0ebbf89a9c2..dfbbd56d28c 100644 --- a/gdb/arch/arm.h +++ b/gdb/arch/arm.h @@ -99,6 +99,21 @@ enum arm_breakpoint_kinds /* IEEE extended doubles are 80 bits. DWORD aligned they use 96 bits. */ #define ARM_FP_REGISTER_SIZE 12 #define ARM_VFP_REGISTER_SIZE 8 +#define IWMMXT_VEC_REGISTER_SIZE 8 + +/* Size of register sets. */ + +/* r0-r12,sp,lr,pc,cpsr. */ +#define ARM_CORE_REGS_SIZE (17 * ARM_INT_REGISTER_SIZE) +/* f0-f8,fps. */ +#define ARM_FP_REGS_SIZE (8 * ARM_FP_REGISTER_SIZE + ARM_INT_REGISTER_SIZE) +/* d0-d15,fpscr. */ +#define ARM_VFP2_REGS_SIZE (16 * ARM_VFP_REGISTER_SIZE + ARM_INT_REGISTER_SIZE) +/* d0-d31,fpscr. */ +#define ARM_VFP3_REGS_SIZE (32 * ARM_VFP_REGISTER_SIZE + ARM_INT_REGISTER_SIZE) +/* wR0-wR15,fpscr. */ +#define IWMMXT_REGS_SIZE (16 * IWMMXT_VEC_REGISTER_SIZE \ + + 6 * ARM_INT_REGISTER_SIZE) /* Addresses for calling Thumb functions have the bit 0 set. Here are some macros to test, set, or clear bit 0 of addresses. */ diff --git a/gdb/arm-linux-nat.c b/gdb/arm-linux-nat.c index c86c97d895a..a1ad6fe01ed 100644 --- a/gdb/arm-linux-nat.c +++ b/gdb/arm-linux-nat.c @@ -276,8 +276,6 @@ store_regs (const struct regcache *regcache) /* Fetch all WMMX registers of the process and store into regcache. */ -#define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4) - static void fetch_wmmx_regs (struct regcache *regcache) { @@ -339,7 +337,7 @@ store_wmmx_regs (const struct regcache *regcache) static void fetch_vfp_regs (struct regcache *regcache) { - gdb_byte regbuf[VFP_REGS_SIZE]; + gdb_byte regbuf[ARM_VFP3_REGS_SIZE]; int ret, tid; struct gdbarch *gdbarch = regcache->arch (); struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); @@ -352,7 +350,7 @@ fetch_vfp_regs (struct regcache *regcache) struct iovec iov; iov.iov_base = regbuf; - iov.iov_len = VFP_REGS_SIZE; + iov.iov_len = ARM_VFP3_REGS_SIZE; ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov); } else @@ -368,7 +366,7 @@ fetch_vfp_regs (struct regcache *regcache) static void store_vfp_regs (const struct regcache *regcache) { - gdb_byte regbuf[VFP_REGS_SIZE]; + gdb_byte regbuf[ARM_VFP3_REGS_SIZE]; int ret, tid; struct gdbarch *gdbarch = regcache->arch (); struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); @@ -381,7 +379,7 @@ store_vfp_regs (const struct regcache *regcache) struct iovec iov; iov.iov_base = regbuf; - iov.iov_len = VFP_REGS_SIZE; + iov.iov_len = ARM_VFP3_REGS_SIZE; ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov); } else @@ -398,7 +396,7 @@ store_vfp_regs (const struct regcache *regcache) struct iovec iov; iov.iov_base = regbuf; - iov.iov_len = VFP_REGS_SIZE; + iov.iov_len = ARM_VFP3_REGS_SIZE; ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov); } else @@ -574,7 +572,7 @@ arm_linux_nat_target::read_description () registers. Support was added in 2.6.30. */ pid = inferior_ptid.lwp (); errno = 0; - buf = (char *) alloca (VFP_REGS_SIZE); + buf = (char *) alloca (ARM_VFP3_REGS_SIZE); if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO) result = NULL; diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 4f2d07350f9..8e3607cdea5 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -8781,25 +8781,16 @@ arm_register_g_packet_guesses (struct gdbarch *gdbarch) cater for remote targets whose register set layout is the same as the FPA layout. */ register_remote_g_packet_guess (gdbarch, - /* r0-r12,sp,lr,pc; f0-f7; fps,xpsr */ - (16 * ARM_INT_REGISTER_SIZE) - + (8 * ARM_FP_REGISTER_SIZE) - + (2 * ARM_INT_REGISTER_SIZE), + ARM_CORE_REGS_SIZE + ARM_FP_REGS_SIZE, tdesc_arm_with_m_fpa_layout); /* The regular M-profile layout. */ - register_remote_g_packet_guess (gdbarch, - /* r0-r12,sp,lr,pc; xpsr */ - (16 * ARM_INT_REGISTER_SIZE) - + ARM_INT_REGISTER_SIZE, + register_remote_g_packet_guess (gdbarch, ARM_CORE_REGS_SIZE, tdesc_arm_with_m); /* M-profile plus M4F VFP. */ register_remote_g_packet_guess (gdbarch, - /* r0-r12,sp,lr,pc; d0-d15; fpscr,xpsr */ - (16 * ARM_INT_REGISTER_SIZE) - + (16 * ARM_VFP_REGISTER_SIZE) - + (2 * ARM_INT_REGISTER_SIZE), + ARM_CORE_REGS_SIZE + ARM_VFP2_REGS_SIZE, tdesc_arm_with_m_vfp_d16); } diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog index f3518368996..0bd61131cbc 100644 --- a/gdb/gdbserver/ChangeLog +++ b/gdb/gdbserver/ChangeLog @@ -1,3 +1,9 @@ +2019-07-04 Alan Hayward + + * linux-aarch32-low.c (arm_read_description, arm_regsets): Use new + defines. + * linux-arm-low.c (arm_read_description, arm_regsets): Likewise. + 2019-07-04 Alan Hayward * configure.srv: Remove legacy xml. diff --git a/gdb/gdbserver/linux-aarch32-low.c b/gdb/gdbserver/linux-aarch32-low.c index 051e614c656..a932373518d 100644 --- a/gdb/gdbserver/linux-aarch32-low.c +++ b/gdb/gdbserver/linux-aarch32-low.c @@ -143,10 +143,10 @@ arm_store_vfpregset (struct regcache *regcache, const void *buf) /* Register sets with using PTRACE_GETREGSET. */ static struct regset_info aarch32_regsets[] = { - { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS, 18 * 4, - GENERAL_REGS, + { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS, + ARM_CORE_REGS_SIZE + ARM_INT_REGISTER_SIZE, GENERAL_REGS, arm_fill_gregset, arm_store_gregset }, - { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARM_VFP, 32 * 8 + 4, + { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARM_VFP, ARM_VFP3_REGS_SIZE, EXTENDED_REGS, arm_fill_vfpregset, arm_store_vfpregset }, NULL_REGSET diff --git a/gdb/gdbserver/linux-arm-low.c b/gdb/gdbserver/linux-arm-low.c index ff72a489cba..b323b190784 100644 --- a/gdb/gdbserver/linux-arm-low.c +++ b/gdb/gdbserver/linux-arm-low.c @@ -876,7 +876,7 @@ arm_read_description (void) /* Now make sure that the kernel supports reading these registers. Support was added in 2.6.30. */ errno = 0; - buf = (char *) xmalloc (32 * 8 + 4); + buf = (char *) xmalloc (ARM_VFP3_REGS_SIZE); if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO) result = tdesc_arm; @@ -973,14 +973,12 @@ arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno) /* Register sets without using PTRACE_GETREGSET. */ static struct regset_info arm_regsets[] = { - { PTRACE_GETREGS, PTRACE_SETREGS, 0, 18 * 4, - GENERAL_REGS, + { PTRACE_GETREGS, PTRACE_SETREGS, 0, + ARM_CORE_REGS_SIZE + ARM_INT_REGISTER_SIZE, GENERAL_REGS, arm_fill_gregset, arm_store_gregset }, - { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, 16 * 8 + 6 * 4, - EXTENDED_REGS, + { PTRACE_GETWMMXREGS, PTRACE_SETWMMXREGS, 0, IWMMXT_REGS_SIZE, EXTENDED_REGS, arm_fill_wmmxregset, arm_store_wmmxregset }, - { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, 32 * 8 + 4, - EXTENDED_REGS, + { PTRACE_GETVFPREGS, PTRACE_SETVFPREGS, 0, ARM_VFP3_REGS_SIZE, EXTENDED_REGS, arm_fill_vfpregset, arm_store_vfpregset }, NULL_REGSET };