From: bugzilla-daemon Date: Tue, 12 May 2020 12:11:22 +0000 (+0000) Subject: [libre-riscv-dev] [Bug 303] define peripheral set for 180nm ASIC X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=351ea13d337a0c5d5f3fc3efa21c1973f6708478;p=libre-riscv-dev.git [libre-riscv-dev] [Bug 303] define peripheral set for 180nm ASIC --- diff --git a/84/e83b1bc7a0bce95fa6768b095f6dd32154980e b/84/e83b1bc7a0bce95fa6768b095f6dd32154980e new file mode 100644 index 0000000..9111f98 --- /dev/null +++ b/84/e83b1bc7a0bce95fa6768b095f6dd32154980e @@ -0,0 +1,66 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Tue, 12 May 2020 13:11:24 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jYTkq-00028Q-95; Tue, 12 May 2020 13:11:24 +0100 +Received: from localhost ([127.0.0.1] helo=bugs.libre-soc.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) id 1jYTko-000284-HU + for libre-riscv-dev@lists.libre-riscv.org; Tue, 12 May 2020 13:11:22 +0100 +From: bugzilla-daemon@libre-soc.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Tue, 12 May 2020 12:11:22 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Source Code +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: lkcl@lkcl.net +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: --- +X-Bugzilla-Assigned-To: yimmanuel3@gatech.edu +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: assigned_to +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: https://bugs.libre-soc.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 303] define peripheral set for 180nm ASIC +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cHM6Ly9idWdzLmxpYnJlLXNvYy5vcmcvc2hvd19idWcuY2dpP2lkPTMwMwoKTHVrZSBLZW5u +ZXRoIENhc3NvbiBMZWlnaHRvbiA8bGtjbEBsa2NsLm5ldD4gY2hhbmdlZDoKCiAgICAgICAgICAg +V2hhdCAgICB8UmVtb3ZlZCAgICAgICAgICAgICAgICAgICAgIHxBZGRlZAotLS0tLS0tLS0tLS0t +LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t +LS0tLS0tCiAgICAgICAgICAgQXNzaWduZWV8bGtjbEBsa2NsLm5ldCAgICAgICAgICAgICAgIHx5 +aW1tYW51ZWwzQGdhdGVjaC5lZHUKCi0tIApZb3UgYXJlIHJlY2VpdmluZyB0aGlzIG1haWwgYmVj +YXVzZToKWW91IGFyZSBvbiB0aGUgQ0MgbGlzdCBmb3IgdGhlIGJ1Zy4KX19fX19fX19fX19fX19f +X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGlicmUtcmlzY3YtZGV2IG1haWxpbmcg +bGlzdApsaWJyZS1yaXNjdi1kZXZAbGlzdHMubGlicmUtcmlzY3Yub3JnCmh0dHA6Ly9saXN0cy5s +aWJyZS1yaXNjdi5vcmcvbWFpbG1hbi9saXN0aW5mby9saWJyZS1yaXNjdi1kZXYK +