From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 8 Apr 2018 18:51:58 +0000 (+0100)
Subject: add plus sides to analysis
X-Git-Tag: convert-csv-opcode-to-binary~5713
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3573ffc3dd7b737f90ffc7ee124335cac2803b39;p=libreriscv.git

add plus sides to analysis
---

diff --git a/simple_v_extension.mdwn b/simple_v_extension.mdwn
index c9fed0c65..65b69b057 100644
--- a/simple_v_extension.mdwn
+++ b/simple_v_extension.mdwn
@@ -846,6 +846,20 @@ So the question boils down to:
   better, making Simple-V have more in common with a software API than
   anything else.
 
+Whilst the above may seem to be severe minuses, there are some strong
+pluses:
+
+* Significant reduction of V's opcode space: over 85%.
+* Smaller reduction of P's opcode space: around 10%.
+* The potential to use Compressed instructions in both Vector and SIMD
+  due to the overloading of register meaning (implicit vectorisation,
+  implicit packing)
+* Not only present but also future extensions automatically gain parallelism.
+* Already mentioned but worth emphasising: the simplification to compiler
+  writers and assembly-level writers of having the same consistent ISA
+  regardless of whether the internal level of parallelism (number of
+  parallel ALUs) is only equal to one ("virtual" parallelism), or is
+  greater than one, should not be underestimated.
 
 
 # References