From: Yehowshua Date: Sat, 2 May 2020 19:29:33 +0000 (+0100) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~2773 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=35935cfc8c9c70c357d0e5a148ee88fbd0dffb2b;p=libreriscv.git --- diff --git a/index.mdwn b/index.mdwn index 131955ecf..196d7d88c 100644 --- a/index.mdwn +++ b/index.mdwn @@ -78,24 +78,41 @@ happy with it and agree to it. 2. The next thing you should do is read through the [bugs list](http://bugs.libre-riscv.org) and see if there are any bugs that pique your interest. -3. After that, go ahead and take a look at the - [git repositories](https://git.libre-riscv.org). - - pip3 install virtualenv requests - mkdir ~/.virtualenvs && cd ~/.virtualenvs - python3 -m venv libresoc - source ~/.virtualenvs/bin/activate - - cd ~; mkdir libresoc; cd libresoc - git clone https://git.libre-riscv.org/git/nmutil.git - git clone https://git.libre-riscv.org/git/ieee754fpu.git - git clone https://git.libre-riscv.org/git/soc.git - - cd nmutil; pip3 install -e .; cd .. - cd ieee754fpu; pip3 install -e .; cd .. - cd soc; pip3 install -e .; cd .. - - python3 soc/src/soc/decoder/power_decoder.py +3. After that, go ahead and take a look at the [git repositories](https://git.libre-riscv.org). + +
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pip3 install virtualenv requests +

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mkdir ~/.virtualenvs && cd ~/.virtualenvs +

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python3 -m venv libresoc +

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source ~/.virtualenvs/bin/activate +

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cd ~; mkdir libresoc; cd libresoc +

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git clone https://git.libre-riscv.org/git/nmutil.git +

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git clone https://git.libre-riscv.org/git/ieee754fpu.git +

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git clone https://git.libre-riscv.org/git/soc.git +

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cd nmutil; pip3 install -e .; cd .. +

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cd ieee754fpu; pip3 install -e .; cd .. +

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cd soc; pip3 install -e .; cd .. +

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#play with the decoder +

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python3 soc/src/soc/decoder/power_decoder.py +

4. If you plan to do HDL work, you should familiarize yourself with our