From: Gabe Black <gblack@eecs.umich.edu>
Date: Sun, 16 Oct 2011 12:06:39 +0000 (-0700)
Subject: SE/FS: Build/expose vport in SE mode.
X-Git-Tag: stable_2012_06_28~312
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3595b0c5a1a3e398a7efae932cd4175cd1ca3f0e;p=gem5.git

SE/FS: Build/expose vport in SE mode.
---

diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index 197bab0b5..52ca97e5f 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -96,15 +96,15 @@ class CheckerThreadContext : public ThreadContext
 
     TheISA::Kernel::Statistics *getKernelStats()
     { return actualTC->getKernelStats(); }
-
-    VirtualPort *getVirtPort()
-    { return actualTC->getVirtPort(); }
 #else
     TranslatingPort *getMemPort() { return actualTC->getMemPort(); }
 
     Process *getProcessPtr() { return actualTC->getProcessPtr(); }
 #endif
 
+    VirtualPort *getVirtPort()
+    { return actualTC->getVirtPort(); }
+
     FunctionalPort *getPhysPort() { return actualTC->getPhysPort(); }
 
     Status status() const { return actualTC->status(); }
diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc
index af6e18291..f5e55627c 100644
--- a/src/cpu/inorder/thread_context.cc
+++ b/src/cpu/inorder/thread_context.cc
@@ -37,14 +37,13 @@
 
 using namespace TheISA;
 
-#if FULL_SYSTEM
-
 VirtualPort *
 InOrderThreadContext::getVirtPort()
 {
     return thread->getVirtPort();
 }
 
+#if FULL_SYSTEM
 
 void
 InOrderThreadContext::dumpFuncProfile()
diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh
index 2d8d8ba03..2586d9372 100644
--- a/src/cpu/inorder/thread_context.hh
+++ b/src/cpu/inorder/thread_context.hh
@@ -118,8 +118,6 @@ class InOrderThreadContext : public ThreadContext
     TheISA::Kernel::Statistics *getKernelStats()
     { return thread->kernelStats; }
 
-    VirtualPort *getVirtPort();
-
     void connectMemPorts(ThreadContext *tc)
     { thread->connectMemPorts(tc); }
 
@@ -151,6 +149,7 @@ class InOrderThreadContext : public ThreadContext
     Process *getProcessPtr() { return thread->getProcessPtr(); }
 #endif
 
+    VirtualPort *getVirtPort();
     FunctionalPort *getPhysPort() { return thread->getPhysPort(); }
 
     /** Returns this thread's status. */
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index 05b865569..afc0d7270 100755
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -97,8 +97,6 @@ class O3ThreadContext : public ThreadContext
     virtual TheISA::Kernel::Statistics *getKernelStats()
     { return thread->kernelStats; }
 
-    virtual VirtualPort *getVirtPort();
-
     virtual void connectMemPorts(ThreadContext *tc) { thread->connectMemPorts(tc); }
 #else
     virtual TranslatingPort *getMemPort() { return thread->getMemPort(); }
@@ -107,6 +105,8 @@ class O3ThreadContext : public ThreadContext
     virtual Process *getProcessPtr() { return thread->getProcessPtr(); }
 #endif
 
+    virtual VirtualPort *getVirtPort();
+
     virtual FunctionalPort *getPhysPort() { return thread->getPhysPort(); }
 
     /** Returns this thread's status. */
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index 4888cf92e..515fa5a50 100755
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -47,7 +47,6 @@
 #include "cpu/quiesce_event.hh"
 #include "debug/O3CPU.hh"
 
-#if FULL_SYSTEM
 template <class Impl>
 VirtualPort *
 O3ThreadContext<Impl>::getVirtPort()
@@ -55,6 +54,7 @@ O3ThreadContext<Impl>::getVirtPort()
     return thread->getVirtPort();
 }
 
+#if FULL_SYSTEM
 template <class Impl>
 void
 O3ThreadContext<Impl>::dumpFuncProfile()
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index 98d236b74..63452d202 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -123,15 +123,15 @@ class OzoneCPU : public BaseCPU
 
         TheISA::Kernel::Statistics *getKernelStats()
         { return thread->getKernelStats(); }
-
-        VirtualPort *getVirtPort()
-        { return thread->getVirtPort(); }
 #else
         TranslatingPort *getMemPort() { return thread->getMemPort(); }
 
         Process *getProcessPtr() { return thread->getProcessPtr(); }
 #endif
 
+        VirtualPort *getVirtPort()
+        { return thread->getVirtPort(); }
+
         FunctionalPort *getPhysPort() { return thread->getPhysPort(); }
 
         Status status() const { return thread->status(); }
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index d9a2005a9..2f629c2e1 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -39,6 +39,7 @@
 #include "cpu/base.hh"
 #include "cpu/simple_thread.hh"
 #include "cpu/thread_context.hh"
+#include "mem/vport.hh"
 #include "params/BaseCPU.hh"
 
 #if FULL_SYSTEM
@@ -50,7 +51,6 @@
 #include "base/trace.hh"
 #include "cpu/profile.hh"
 #include "cpu/quiesce_event.hh"
-#include "mem/vport.hh"
 #include "sim/serialize.hh"
 #include "sim/sim_exit.hh"
 #else
@@ -118,9 +118,7 @@ SimpleThread::SimpleThread()
 SimpleThread::~SimpleThread()
 {
     delete physPort;
-#if FULL_SYSTEM
     delete virtPort;
-#endif
     delete tc;
 }
 
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 30dca8369..4baf832f6 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -207,15 +207,13 @@ class SimpleThread : public ThreadState
 
     System *getSystemPtr() { return system; }
 
-#if FULL_SYSTEM
+    FunctionalPort *getPhysPort() { return physPort; }
+
     /** Return a virtual port. This port cannot be cached locally in an object.
      * After a CPU switch it may point to the wrong memory object which could
      * mean stale data.
      */
     VirtualPort *getVirtPort() { return virtPort; }
-#endif
-
-    FunctionalPort *getPhysPort() { return physPort; }
 
     Status status() const { return _status; }
 
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 7d98a4049..eac214f77 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -128,8 +128,6 @@ class ThreadContext
 #if FULL_SYSTEM
     virtual TheISA::Kernel::Statistics *getKernelStats() = 0;
 
-    virtual VirtualPort *getVirtPort() = 0;
-
     virtual void connectMemPorts(ThreadContext *tc) = 0;
 #else
     virtual TranslatingPort *getMemPort() = 0;
@@ -137,6 +135,8 @@ class ThreadContext
     virtual Process *getProcessPtr() = 0;
 #endif
 
+    virtual VirtualPort *getVirtPort() = 0;
+
     virtual FunctionalPort *getPhysPort() = 0;
 
     virtual Status status() const = 0;
@@ -298,8 +298,6 @@ class ProxyThreadContext : public ThreadContext
     TheISA::Kernel::Statistics *getKernelStats()
     { return actualTC->getKernelStats(); }
 
-    VirtualPort *getVirtPort() { return actualTC->getVirtPort(); }
-
     void connectMemPorts(ThreadContext *tc) { actualTC->connectMemPorts(tc); }
 #else
     TranslatingPort *getMemPort() { return actualTC->getMemPort(); }
@@ -307,6 +305,8 @@ class ProxyThreadContext : public ThreadContext
     Process *getProcessPtr() { return actualTC->getProcessPtr(); }
 #endif
 
+    VirtualPort *getVirtPort() { return actualTC->getVirtPort(); }
+
     FunctionalPort *getPhysPort() { return actualTC->getPhysPort(); }
 
     Status status() const { return actualTC->status(); }
diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index 0abe2bf81..a0fd5d7a1 100644
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -34,12 +34,12 @@
 #include "cpu/thread_state.hh"
 #include "mem/port.hh"
 #include "mem/translating_port.hh"
+#include "mem/vport.hh"
 #include "sim/serialize.hh"
 
 #if FULL_SYSTEM
 #include "arch/kernel_stats.hh"
 #include "cpu/quiesce_event.hh"
-#include "mem/vport.hh"
 #endif
 
 #if FULL_SYSTEM
@@ -51,11 +51,11 @@ ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
       baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
 #if FULL_SYSTEM
       profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
-      kernelStats(NULL), virtPort(NULL),
+      kernelStats(NULL),
 #else
       port(NULL), process(_process),
 #endif
-      physPort(NULL), funcExeInst(0), storeCondFailures(0)
+      virtPort(NULL), physPort(NULL), funcExeInst(0), storeCondFailures(0)
 {
 }
 
@@ -118,14 +118,6 @@ ThreadState::connectPhysPort()
     connectToMemFunc(physPort);
 }
 
-#if FULL_SYSTEM
-void
-ThreadState::connectMemPorts(ThreadContext *tc)
-{
-    connectPhysPort();
-    connectVirtPort(tc);
-}
-
 void
 ThreadState::connectVirtPort(ThreadContext *tc)
 {
@@ -140,6 +132,14 @@ ThreadState::connectVirtPort(ThreadContext *tc)
     connectToMemFunc(virtPort);
 }
 
+#if FULL_SYSTEM
+void
+ThreadState::connectMemPorts(ThreadContext *tc)
+{
+    connectPhysPort();
+    connectVirtPort(tc);
+}
+
 void
 ThreadState::profileClear()
 {
diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index b7727f4ee..8fd99f7cf 100644
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -94,11 +94,11 @@ struct ThreadState {
 
     void connectPhysPort();
 
+    void connectVirtPort(ThreadContext *tc);
+
 #if FULL_SYSTEM
     void connectMemPorts(ThreadContext *tc);
 
-    void connectVirtPort(ThreadContext *tc);
-
     void dumpFuncProfile();
 
     EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
@@ -108,8 +108,6 @@ struct ThreadState {
     void profileSample();
 
     TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
-
-    VirtualPort *getVirtPort() { return virtPort; }
 #else
     Process *getProcessPtr() { return process; }
 
@@ -118,6 +116,8 @@ struct ThreadState {
     void setMemPort(TranslatingPort *_port) { port = _port; }
 #endif
 
+    VirtualPort *getVirtPort() { return virtPort; }
+
     FunctionalPort *getPhysPort() { return physPort; }
 
     void setPhysPort(FunctionalPort *port) { physPort = port; }
@@ -186,15 +186,16 @@ struct ThreadState {
 
     TheISA::Kernel::Statistics *kernelStats;
   protected:
-    /** A functional port, outgoing only, for functional accesse to virtual
-     * addresses. */
-    VirtualPort *virtPort;
 #else
     TranslatingPort *port;
 
     Process *process;
 #endif
 
+    /** A functional port, outgoing only, for functional accesse to virtual
+     * addresses. */
+    VirtualPort *virtPort;
+
     /** A functional port outgoing only for functional accesses to physical
      * addresses.*/
     FunctionalPort *physPort;
diff --git a/src/mem/SConscript b/src/mem/SConscript
index 298e1e09f..c446772d8 100644
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -37,19 +37,18 @@ SimObject('MemObject.py')
 Source('bridge.cc')
 Source('bus.cc')
 Source('mem_object.cc')
+Source('mport.cc')
 Source('packet.cc')
 Source('port.cc')
 Source('tport.cc')
-Source('mport.cc')
+Source('vport.cc')
 
 if env['TARGET_ISA'] != 'no':
     SimObject('PhysicalMemory.py')
     Source('dram.cc')
     Source('physical.cc')
 
-if env['FULL_SYSTEM']:
-    Source('vport.cc')
-elif env['TARGET_ISA'] != 'no':
+if not env['FULL_SYSTEM'] and env['TARGET_ISA'] != 'no':
     Source('page_table.cc')
     Source('translating_port.cc')