From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 9 Oct 2021 19:51:24 +0000 (+0100)
Subject: add PartType context to PartitionedMux
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=36096f0fd42ed3e9ea1730e2b15322d1f553d9c0;p=ieee754fpu.git

add PartType context to PartitionedMux
not presently used, TBD, no harm done not using it due to the way that
PartitionedMux works
---

diff --git a/src/ieee754/part/partsig.py b/src/ieee754/part/partsig.py
index 2701fedd..bf9fa100 100644
--- a/src/ieee754/part/partsig.py
+++ b/src/ieee754/part/partsig.py
@@ -126,7 +126,7 @@ class PartitionedSignal(UserValue):
         assert len(val1) == len(val2), \
             "PartitionedSignal width sources must be the same " \
             "val1 == %d, val2 == %d" % (len(val1), len(val2))
-        return PMux(self.m, self.partpoints, self, val1, val2)
+        return PMux(self.m, self.partpoints, self, val1, val2, self.ptype)
 
     def __Assign__(self, val, *, src_loc_at=0):
         # print ("partsig ass", self, val)
diff --git a/src/ieee754/part/test/test_partsig.py b/src/ieee754/part/test/test_partsig.py
index efcc5e8c..1830af12 100644
--- a/src/ieee754/part/test/test_partsig.py
+++ b/src/ieee754/part/test/test_partsig.py
@@ -66,7 +66,6 @@ class TestAddMod2(Elaboratable):
         self.le_output = Signal(len(partpoints)+1)
         self.mux_sel2 = Signal(len(partpoints)+1)
         self.mux_sel2 = PartitionedSignal(partpoints, len(partpoints))
-        self.mux_out = Signal(width)
         self.mux2_out = Signal(width)
         self.carry_in = Signal(len(partpoints)+1)
         self.add_carry_out = Signal(len(partpoints)+1)
@@ -103,7 +102,6 @@ class TestAddMod2(Elaboratable):
         sync += self.ls_output.eq(self.a << self.b)
         sync += self.rs_output.eq(self.a >> self.b)
         ppts = self.partpoints
-        sync += self.mux_out.eq(PMux(m, ppts, self.mux_sel, self.a, self.b))
         sync += self.mux_out2.eq(Mux(self.mux_sel2, self.a, self.b))
         # scalar left shift
         comb += self.bsig.eq(self.b.lower())
@@ -120,7 +118,6 @@ class TestMuxMod(Elaboratable):
         self.b = PartitionedSignal(partpoints, width)
         self.mux_sel = Signal(len(partpoints)+1)
         self.mux_sel2 = PartitionedSignal(partpoints, len(partpoints)+1)
-        self.mux_out = Signal(width)
         self.mux_out2 = Signal(width)
 
     def elaborate(self, platform):
@@ -132,7 +129,6 @@ class TestMuxMod(Elaboratable):
         self.mux_sel2.set_module(m)
         ppts = self.partpoints
 
-        comb += self.mux_out.eq(PMux(m, ppts, self.mux_sel, self.a, self.b))
         comb += self.mux_out2.eq(Mux(self.mux_sel2, self.a, self.b))
 
         return m
@@ -278,7 +274,6 @@ class TestMux(unittest.TestCase):
         traces = [part_mask,
                   module.a.sig,
                   module.b.sig,
-                  module.mux_out,
                   module.mux_out2]
         sim = create_simulator(module, traces, test_name)
 
@@ -324,7 +319,6 @@ class TestMux(unittest.TestCase):
                             else:
                                 y |= (b & mask)
                         # check the result
-                        outval = (yield module.mux_out)
                         outval2 = (yield module.mux_out2)
                         msg = f"{msg_prefix}: mux " + \
                             f"0x{sel:X} ? 0x{a:X} : 0x{b:X}" + \
diff --git a/src/ieee754/part_mux/part_mux.py b/src/ieee754/part_mux/part_mux.py
index e5d2c87f..6cf14a70 100644
--- a/src/ieee754/part_mux/part_mux.py
+++ b/src/ieee754/part_mux/part_mux.py
@@ -19,12 +19,12 @@ from ieee754.part_mul_add.partpoints import make_partition2
 
 
 modcount = 0 # global for now
-def PMux(m, mask, sel, a, b):
+def PMux(m, mask, sel, a, b, ctx):
     global modcount
     modcount += 1
     width = len(a.sig)  # get width
     part_pts = make_partition2(mask, width) # create partition points
-    pm = PartitionedMux(width, part_pts)
+    pm = PartitionedMux(width, part_pts, ctx)
     m.d.comb += pm.a.eq(a.sig)
     m.d.comb += pm.b.eq(b.sig)
     m.d.comb += pm.sel.eq(sel)
@@ -41,8 +41,9 @@ class PartitionedMux(Elaboratable):
     consequently the incoming selector (sel) can completely
     ignore what the *actual* partition bits are.
     """
-    def __init__(self, width, partition_points):
+    def __init__(self, width, partition_points, ctx):
         self.width = width
+        self.ctx = ctx
         self.partition_points = PartitionPoints(partition_points)
         self.mwidth = len(self.partition_points)+1
         self.a = Signal(width, reset_less=True)