From: Kyrylo Tkachov Date: Tue, 4 Aug 2015 10:06:51 +0000 (+0000) Subject: [AArch64][6/14] Implement TARGET_OPTION_SAVE/TARGET_OPTION_RESTORE X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=361fb3ee79f07fcff6c34acd1ccde520f4935c7e;p=gcc.git [AArch64][6/14] Implement TARGET_OPTION_SAVE/TARGET_OPTION_RESTORE * config/aarch64/aarch64.opt (explicit_tune_core): New TargetVariable. (explicit_arch): Likewise. (x_aarch64_isa_flags): Likewise. (mgeneral-regs-only): Mark as Save. (mfix-cortex-a53-835769): Likewise. (mcmodel=): Likewise. (mstrict-align): Likewise. (momit-leaf-frame-pointer): Likewise. (mtls-dialect): Likewise. (master=): Likewise. * config/aarch64/aarch64.h (ASM_DECLARE_FUNCTION_NAME): Define. (aarch64_isa_flags): Remove extern declaration. * config/aarch64/aarch64.c (aarch64_validate_mcpu): Return a bool to indicate success or failure. (aarch64_validate_march): Likewise. (aarch64_validate_mtune): Likewise. (aarch64_isa_flags): Delete. (aarch64_override_options_internal): Access opts->x_aarch64_isa_flags instead of aarch64_isa_flags. (aarch64_get_tune_cpu): New function. (aarch64_get_arch): Likewise. (aarch64_override_options): Use above and set up explicit_tune_core and explicit_arch. (aarch64_print_extension): Move earlier in file. Add isa_flags argument and use that instead of the global aarch64_isa_flags. (aarch64_option_save): New function. (aarch64_option_restore): Likewise. (aarch64_option_print): Likewise. (aarch64_declare_function_name): Likewise. (aarch64_start_file): Delete. (TARGET_ASM_FILE_START): Do not define. (TARGET_OPTION_RESTORE, TARGET_OPTION_PRINT): Define. * config/aarch64/aarch64-protos.h (aarch64_declare_function_name): Declare prototype. From-SVN: r226558 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 284547c9ef1..985d7df8a80 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,40 @@ +2015-08-04 Kyrylo Tkachov + + * config/aarch64/aarch64.opt (explicit_tune_core): New TargetVariable. + (explicit_arch): Likewise. + (x_aarch64_isa_flags): Likewise. + (mgeneral-regs-only): Mark as Save. + (mfix-cortex-a53-835769): Likewise. + (mcmodel=): Likewise. + (mstrict-align): Likewise. + (momit-leaf-frame-pointer): Likewise. + (mtls-dialect): Likewise. + (master=): Likewise. + * config/aarch64/aarch64.h (ASM_DECLARE_FUNCTION_NAME): Define. + (aarch64_isa_flags): Remove extern declaration. + * config/aarch64/aarch64.c (aarch64_validate_mcpu): Return a bool + to indicate success or failure. + (aarch64_validate_march): Likewise. + (aarch64_validate_mtune): Likewise. + (aarch64_isa_flags): Delete. + (aarch64_override_options_internal): Access opts->x_aarch64_isa_flags + instead of aarch64_isa_flags. + (aarch64_get_tune_cpu): New function. + (aarch64_get_arch): Likewise. + (aarch64_override_options): Use above and set up explicit_tune_core + and explicit_arch. + (aarch64_print_extension): Move earlier in file. Add isa_flags + argument and use that instead of the global aarch64_isa_flags. + (aarch64_option_save): New function. + (aarch64_option_restore): Likewise. + (aarch64_option_print): Likewise. + (aarch64_declare_function_name): Likewise. + (aarch64_start_file): Delete. + (TARGET_ASM_FILE_START): Do not define. + (TARGET_OPTION_RESTORE, TARGET_OPTION_PRINT): Define. + * config/aarch64/aarch64-protos.h (aarch64_declare_function_name): + Declare prototype. + 2015-08-04 Kyrylo Tkachov * config/aarch64/aarch64.opt (momit-leaf-frame-pointer): Initialize diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index e4f5b00fb0b..fc1cec75db2 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -255,6 +255,7 @@ bool aarch64_gimple_fold_builtin (gimple_stmt_iterator *); bool aarch64_is_extend_from_extract (machine_mode, rtx, rtx); bool aarch64_is_long_call_p (rtx); bool aarch64_label_mentioned_p (rtx); +void aarch64_declare_function_name (FILE *, const char*, tree); bool aarch64_legitimate_pic_operand_p (rtx); bool aarch64_modes_tieable_p (machine_mode mode1, machine_mode mode2); diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 3cd29272d33..caf50ea70e7 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -158,9 +158,6 @@ unsigned aarch64_architecture_version; /* The processor for which instructions should be scheduled. */ enum aarch64_processor aarch64_tune = cortexa53; -/* Mask to specify which instructions we are allowed to generate. */ -unsigned long aarch64_isa_flags = 0; - /* Mask to specify which instruction scheduling options should be used. */ unsigned long aarch64_tune_flags = 0; @@ -531,8 +528,8 @@ static const struct processor all_cores[] = }; -/* Target specification. These are populated as commandline arguments - are processed, or NULL if not specified. */ +/* Target specification. These are populated by the -march, -mtune, -mcpu + handling code or by target attributes. */ static const struct processor *selected_arch; static const struct processor *selected_cpu; static const struct processor *selected_tune; @@ -7552,7 +7549,7 @@ aarch64_override_options_internal (struct gcc_options *opts) /* aarch64_parse_extension takes char* rather than const char* because it is usually called from within other parsing functions. */ char tmp_str[] = "+nofp"; - aarch64_parse_extension (tmp_str, &aarch64_isa_flags); + aarch64_parse_extension (tmp_str, &opts->x_aarch64_isa_flags); } initialize_aarch64_code_model (opts); @@ -7562,9 +7559,10 @@ aarch64_override_options_internal (struct gcc_options *opts) /* Validate a command-line -mcpu option. Parse the cpu and extensions (if any) specified in STR and throw errors if appropriate. Put the results if - they are valid in RES and ISA_FLAGS. */ + they are valid in RES and ISA_FLAGS. Return whether the option is + valid. */ -static void +static bool aarch64_validate_mcpu (const char *str, const struct processor **res, unsigned long *isa_flags) { @@ -7572,7 +7570,7 @@ aarch64_validate_mcpu (const char *str, const struct processor **res, = aarch64_parse_cpu (str, res, isa_flags); if (parse_res == AARCH64_PARSE_OK) - return; + return true; switch (parse_res) { @@ -7588,13 +7586,16 @@ aarch64_validate_mcpu (const char *str, const struct processor **res, default: gcc_unreachable (); } + + return false; } /* Validate a command-line -march option. Parse the arch and extensions (if any) specified in STR and throw errors if appropriate. Put the - results, if they are valid, in RES and ISA_FLAGS. */ + results, if they are valid, in RES and ISA_FLAGS. Return whether the + option is valid. */ -static void +static bool aarch64_validate_march (const char *str, const struct processor **res, unsigned long *isa_flags) { @@ -7602,7 +7603,7 @@ aarch64_validate_march (const char *str, const struct processor **res, = aarch64_parse_arch (str, res, isa_flags); if (parse_res == AARCH64_PARSE_OK) - return; + return true; switch (parse_res) { @@ -7618,20 +7619,23 @@ aarch64_validate_march (const char *str, const struct processor **res, default: gcc_unreachable (); } + + return false; } /* Validate a command-line -mtune option. Parse the cpu specified in STR and throw errors if appropriate. Put the - result, if it is valid, in RES. */ + result, if it is valid, in RES. Return whether the option is + valid. */ -static void +static bool aarch64_validate_mtune (const char *str, const struct processor **res) { enum aarch64_parse_opt_result parse_res = aarch64_parse_tune (str, res); if (parse_res == AARCH64_PARSE_OK) - return; + return true; switch (parse_res) { @@ -7644,6 +7648,38 @@ aarch64_validate_mtune (const char *str, const struct processor **res) default: gcc_unreachable (); } + return false; +} + +/* Return the CPU corresponding to the enum CPU. + If it doesn't specify a cpu, return the default. */ + +static const struct processor * +aarch64_get_tune_cpu (enum aarch64_processor cpu) +{ + if (cpu != aarch64_none) + return &all_cores[cpu]; + + /* The & 0x3f is to extract the bottom 6 bits that encode the + default cpu as selected by the --with-cpu GCC configure option + in config.gcc. + ???: The whole TARGET_CPU_DEFAULT and AARCH64_CPU_DEFAULT_FLAGS + flags mechanism should be reworked to make it more sane. */ + return &all_cores[TARGET_CPU_DEFAULT & 0x3f]; +} + +/* Return the architecture corresponding to the enum ARCH. + If it doesn't specify a valid architecture, return the default. */ + +static const struct processor * +aarch64_get_arch (enum aarch64_arch arch) +{ + if (arch != aarch64_no_arch) + return &all_architectures[arch]; + + const struct processor *cpu = &all_cores[TARGET_CPU_DEFAULT & 0x3f]; + + return &all_architectures[cpu->arch]; } /* Implement TARGET_OPTION_OVERRIDE. This is called once in the beginning @@ -7660,6 +7696,10 @@ aarch64_override_options (void) unsigned long arch_isa = 0; aarch64_isa_flags = 0; + bool valid_cpu = true; + bool valid_tune = true; + bool valid_arch = true; + selected_cpu = NULL; selected_arch = NULL; selected_tune = NULL; @@ -7668,13 +7708,15 @@ aarch64_override_options (void) If either of -march or -mtune is given, they override their respective component of -mcpu. */ if (aarch64_cpu_string) - aarch64_validate_mcpu (aarch64_cpu_string, &selected_cpu, &cpu_isa); + valid_cpu = aarch64_validate_mcpu (aarch64_cpu_string, &selected_cpu, + &cpu_isa); if (aarch64_arch_string) - aarch64_validate_march (aarch64_arch_string, &selected_arch, &arch_isa); + valid_arch = aarch64_validate_march (aarch64_arch_string, &selected_arch, + &arch_isa); if (aarch64_tune_string) - aarch64_validate_mtune (aarch64_tune_string, &selected_tune); + valid_tune = aarch64_validate_mtune (aarch64_tune_string, &selected_tune); /* If the user did not specify a processor, choose the default one for them. This will be the CPU set during configuration using @@ -7685,12 +7727,17 @@ aarch64_override_options (void) { selected_cpu = &all_cores[selected_arch->ident]; aarch64_isa_flags = arch_isa; + explicit_arch = selected_arch->arch; } else { - selected_cpu = &all_cores[TARGET_CPU_DEFAULT & 0x3f]; + /* Get default configure-time CPU. */ + selected_cpu = aarch64_get_tune_cpu (aarch64_none); aarch64_isa_flags = TARGET_CPU_DEFAULT >> 6; } + + if (selected_tune) + explicit_tune_core = selected_tune->ident; } /* If both -mcpu and -march are specified check that they are architecturally compatible, warn if they're not and prefer the -march ISA flags. */ @@ -7703,11 +7750,19 @@ aarch64_override_options (void) selected_arch->name); } aarch64_isa_flags = arch_isa; + explicit_arch = selected_arch->arch; + explicit_tune_core = selected_tune ? selected_tune->ident + : selected_cpu->ident; } else { /* -mcpu but no -march. */ aarch64_isa_flags = cpu_isa; + explicit_tune_core = selected_tune ? selected_tune->ident + : selected_cpu->ident; + gcc_assert (selected_cpu); + selected_arch = &all_architectures[selected_cpu->arch]; + explicit_arch = selected_arch->arch; } /* Set the arch as well as we will need it when outputing @@ -7728,6 +7783,15 @@ aarch64_override_options (void) error ("Assembler does not support -mabi=ilp32"); #endif + /* Make sure we properly set up the explicit options. */ + if ((aarch64_cpu_string && valid_cpu) + || (aarch64_tune_string && valid_tune)) + gcc_assert (explicit_tune_core != aarch64_none); + + if ((aarch64_cpu_string && valid_cpu) + || (aarch64_arch_string && valid_arch)) + gcc_assert (explicit_arch != aarch64_no_arch); + aarch64_build_bitmask_table (); aarch64_override_options_internal (&global_options); @@ -7794,6 +7858,59 @@ initialize_aarch64_code_model (struct gcc_options *opts) aarch64_cmodel = opts->x_aarch64_cmodel_var; } +/* Print to F the architecture features specified by ISA_FLAGS. */ + +static void +aarch64_print_extension (FILE *f, unsigned long isa_flags) +{ + const struct aarch64_option_extension *opt = NULL; + + for (opt = all_extensions; opt->name != NULL; opt++) + if ((isa_flags & opt->flags_on) == opt->flags_on) + asm_fprintf (f, "+%s", opt->name); + + asm_fprintf (f, "\n"); +} + +/* Implement TARGET_OPTION_SAVE. */ + +static void +aarch64_option_save (struct cl_target_option *ptr, struct gcc_options *opts) +{ + ptr->x_aarch64_override_tune_string = opts->x_aarch64_override_tune_string; +} + +/* Implements TARGET_OPTION_RESTORE. Restore the backend codegen decisions + using the information saved in PTR. */ + +static void +aarch64_option_restore (struct gcc_options *opts, struct cl_target_option *ptr) +{ + opts->x_explicit_tune_core = ptr->x_explicit_tune_core; + selected_tune = aarch64_get_tune_cpu (ptr->x_explicit_tune_core); + opts->x_explicit_arch = ptr->x_explicit_arch; + selected_arch = aarch64_get_arch (ptr->x_explicit_arch); + opts->x_aarch64_override_tune_string = ptr->x_aarch64_override_tune_string; + + aarch64_override_options_internal (opts); +} + +/* Implement TARGET_OPTION_PRINT. */ + +static void +aarch64_option_print (FILE *file, int indent, struct cl_target_option *ptr) +{ + const struct processor *cpu + = aarch64_get_tune_cpu (ptr->x_explicit_tune_core); + unsigned long isa_flags = ptr->x_aarch64_isa_flags; + const struct processor *arch = aarch64_get_arch (ptr->x_explicit_arch); + + fprintf (file, "%*sselected tune = %s\n", indent, "", cpu->name); + fprintf (file, "%*sselected arch = %s", indent, "", arch->name); + aarch64_print_extension (file, isa_flags); +} + + /* Return true if SYMBOL_REF X binds locally. */ static bool @@ -9805,6 +9922,42 @@ aarch64_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global) return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | type; } +/* Implement ASM_DECLARE_FUNCTION_NAME. Output the ISA features used + by the function fndecl. */ + +void +aarch64_declare_function_name (FILE *stream, const char* name, + tree fndecl) +{ + tree target_parts = DECL_FUNCTION_SPECIFIC_TARGET (fndecl); + + struct cl_target_option *targ_options; + if (target_parts) + targ_options = TREE_TARGET_OPTION (target_parts); + else + targ_options = TREE_TARGET_OPTION (target_option_current_node); + gcc_assert (targ_options); + + const struct processor *this_arch + = aarch64_get_arch (targ_options->x_explicit_arch); + + asm_fprintf (asm_out_file, "\t.arch %s", this_arch->name); + aarch64_print_extension (asm_out_file, targ_options->x_aarch64_isa_flags); + + /* Print the cpu name we're tuning for in the comments, might be + useful to readers of the generated asm. */ + + const struct processor *this_tune + = aarch64_get_tune_cpu (targ_options->x_explicit_tune_core); + + asm_fprintf (asm_out_file, "\t" ASM_COMMENT_START ".tune %s\n", + this_tune->name); + + /* Don't forget the type directive for ELF. */ + ASM_OUTPUT_TYPE_DIRECTIVE (stream, name, "function"); + ASM_OUTPUT_LABEL (stream, name); +} + /* Emit load exclusive. */ static void @@ -10085,36 +10238,6 @@ aarch64_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem, aarch64_emit_post_barrier (model); } -static void -aarch64_print_extension (void) -{ - const struct aarch64_option_extension *opt = NULL; - - for (opt = all_extensions; opt->name != NULL; opt++) - if ((aarch64_isa_flags & opt->flags_on) == opt->flags_on) - asm_fprintf (asm_out_file, "+%s", opt->name); - - asm_fprintf (asm_out_file, "\n"); -} - -static void -aarch64_start_file (void) -{ - if (selected_arch) - { - asm_fprintf (asm_out_file, "\t.arch %s", selected_arch->name); - aarch64_print_extension (); - } - else if (selected_cpu) - { - const char *truncated_name - = aarch64_rewrite_selected_cpu (selected_cpu->name); - asm_fprintf (asm_out_file, "\t.cpu %s", truncated_name); - aarch64_print_extension (); - } - default_file_start(); -} - static void aarch64_init_libfuncs (void) { @@ -12174,9 +12297,6 @@ aarch64_promoted_type (const_tree t) #define TARGET_ASM_CAN_OUTPUT_MI_THUNK \ hook_bool_const_tree_hwi_hwi_const_tree_true -#undef TARGET_ASM_FILE_START -#define TARGET_ASM_FILE_START aarch64_start_file - #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK aarch64_output_mi_thunk @@ -12296,6 +12416,15 @@ aarch64_promoted_type (const_tree t) #define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE \ aarch64_override_options_after_change +#undef TARGET_OPTION_SAVE +#define TARGET_OPTION_SAVE aarch64_option_save + +#undef TARGET_OPTION_RESTORE +#define TARGET_OPTION_RESTORE aarch64_option_restore + +#undef TARGET_OPTION_PRINT +#define TARGET_OPTION_PRINT aarch64_option_print + #undef TARGET_PASS_BY_REFERENCE #define TARGET_PASS_BY_REFERENCE aarch64_pass_by_reference diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 1f8f52cede9..9333bdc1d50 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -223,7 +223,7 @@ extern unsigned aarch64_architecture_version; | AARCH64_FL_LOR | AARCH64_FL_RDMA) /* Macros to test ISA flags. */ -extern unsigned long aarch64_isa_flags; + #define AARCH64_ISA_CRC (aarch64_isa_flags & AARCH64_FL_CRC) #define AARCH64_ISA_CRYPTO (aarch64_isa_flags & AARCH64_FL_CRYPTO) #define AARCH64_ISA_FP (aarch64_isa_flags & AARCH64_FL_FP) @@ -438,6 +438,10 @@ extern unsigned long aarch64_isa_flags; #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ aarch64_asm_preferred_eh_data_format ((CODE), (GLOBAL)) +/* Output the assembly strings we want to add to a function definition. */ +#define ASM_DECLARE_FUNCTION_NAME(STR, NAME, DECL) \ + aarch64_declare_function_name (STR, NAME, DECL) + /* The register that holds the return address in exception handlers. */ #define AARCH64_EH_STACKADJ_REGNUM (R0_REGNUM + 4) #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, AARCH64_EH_STACKADJ_REGNUM) diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt index e29d606bf78..37c2c509fe2 100644 --- a/gcc/config/aarch64/aarch64.opt +++ b/gcc/config/aarch64/aarch64.opt @@ -21,6 +21,18 @@ HeaderInclude config/aarch64/aarch64-opts.h +TargetVariable +enum aarch64_processor explicit_tune_core = aarch64_none + +TargetVariable +enum aarch64_arch explicit_arch = aarch64_no_arch + +TargetSave +const char *x_aarch64_override_tune_string + +TargetVariable +unsigned long aarch64_isa_flags = 0 + ; The TLS dialect names to use with -mtls-dialect. Enum @@ -53,11 +65,11 @@ Target Report RejectNegative Mask(BIG_END) Assume target CPU is configured as big endian mgeneral-regs-only -Target Report RejectNegative Mask(GENERAL_REGS_ONLY) +Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save Generate code which uses only the general registers mfix-cortex-a53-835769 -Target Report Var(aarch64_fix_a53_err835769) Init(2) +Target Report Var(aarch64_fix_a53_err835769) Init(2) Save Workaround for ARM Cortex-A53 Erratum number 835769 mfix-cortex-a53-843419 @@ -69,19 +81,19 @@ Target Report RejectNegative InverseMask(BIG_END) Assume target CPU is configured as little endian mcmodel= -Target RejectNegative Joined Enum(cmodel) Var(aarch64_cmodel_var) Init(AARCH64_CMODEL_SMALL) +Target RejectNegative Joined Enum(cmodel) Var(aarch64_cmodel_var) Init(AARCH64_CMODEL_SMALL) Save Specify the code model mstrict-align -Target Report RejectNegative Mask(STRICT_ALIGN) +Target Report RejectNegative Mask(STRICT_ALIGN) Save Don't assume that unaligned accesses are handled by the system momit-leaf-frame-pointer -Target Report Save Var(flag_omit_leaf_frame_pointer) Init(2) +Target Report Var(flag_omit_leaf_frame_pointer) Init(2) Save Omit the frame pointer in leaf functions mtls-dialect= -Target RejectNegative Joined Enum(tls_type) Var(aarch64_tls_dialect) Init(TLS_DESCRIPTORS) +Target RejectNegative Joined Enum(tls_type) Var(aarch64_tls_dialect) Init(TLS_DESCRIPTORS) Save Specify TLS dialect march=