From: lkcl <lkcl@web>
Date: Wed, 8 Sep 2021 12:46:28 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~182
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3629c02094d16cfcf30f86cdfd1fe6c16665e6b1;p=libreriscv.git

---

diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn
index 52400de00..43ba20158 100644
--- a/openpower/sv/cr_ops.mdwn
+++ b/openpower/sv/cr_ops.mdwn
@@ -108,8 +108,9 @@ These are again slightly different compared to SVP64 arithmetic
 pred-result (described in [[svp64/appendix]]). The reason is that,
 again, for arithmetic operations the production of a CR Field when
 Rc=1 is a *co-result* accompanying the main arithmetic result, whereas
-for CR-based operations the CR Field or CR bit *is* itself the result
-of the operation.
+for CR-based operations the CR Field (referred to by a 3-bit
+v3.0B base operand from e.g. `mfcr`) or CR bit (referred to by a 5-bit operand from e.g. `crnor`)
+*is* itself the explicit and sole result of the operation.
 
 Therefore, logically, Predicate-result needs to be adapted to
 test the actual result of the CR-based instruction, rather than