From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 19 Apr 2019 01:42:20 +0000 (+0100)
Subject: experimenting with PTW
X-Git-Tag: div_pipeline~2220
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=36353060f02aec6cc97765b703724cd5b9ac761f;p=soc.git

experimenting with PTW
---

diff --git a/TLB/src/ariane/test_ptw.py b/TLB/src/ariane/test_ptw.py
index 35581bdb..fd5fc0ac 100644
--- a/TLB/src/ariane/test_ptw.py
+++ b/TLB/src/ariane/test_ptw.py
@@ -44,6 +44,41 @@ def testbench(dut):
     yield
     yield
 
+    addr = 0x4000000
+    yield dut.dtlb_vaddr_i.eq(addr)
+    yield dut.mxr_i.eq(0x1)
+    yield dut.req_port_i.data_gnt.eq(1)
+    yield dut.req_port_i.data_rvalid.eq(1)
+    yield dut.req_port_i.data_rdata.eq(0x82<<56 | addr<<2)#pte.flatten())
+
+    yield dut.en_ld_st_translation_i.eq(1)
+    yield dut.asid_i.eq(1)
+
+    yield dut.dtlb_access_i.eq(1)
+    yield dut.dtlb_hit_i.eq(0)
+    yield dut.dtlb_vaddr_i.eq(addr)
+
+    yield
+    yield
+    yield
+    yield
+    yield
+    yield
+    yield
+    yield
+
+    yield dut.req_port_i.data_gnt.eq(0)
+    yield dut.dtlb_access_i.eq(1)
+    yield dut.dtlb_hit_i.eq(0)
+    yield dut.dtlb_vaddr_i.eq(0x400000011)
+
+    yield
+    yield dut.req_port_i.data_gnt.eq(1)
+    yield
+    yield
+    yield
+    yield
+
     yield