From: Sagar Ghuge <sagar.ghuge@intel.com>
Date: Wed, 18 Sep 2019 19:37:59 +0000 (-0700)
Subject: intel/isl: Support lossless compression with multisamples
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=366fcbf2d8d35e187e4d28e1410605c15b6da101;p=mesa.git

intel/isl: Support lossless compression with multisamples

GEN12 adds the ability to losslessly compress each sample plane in a
multisampled buffer that uses MCS compression.

v2: Remove unnecessary assertion (Nanley Chery)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
---

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index b22cd009e83..7ca2dc7809b 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1848,13 +1848,9 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
    if (aux_surf->usage & ISL_SURF_USAGE_CCS_BIT)
       return false;
 
-   /* Only multisampled depth buffers with HiZ can have CCS. */
-   if (surf->samples > 1 && !(aux_surf->usage & ISL_SURF_USAGE_HIZ_BIT))
+   if (ISL_DEV_GEN(dev) < 12 && surf->samples > 1)
       return false;
 
-   assert(surf->msaa_layout == ISL_MSAA_LAYOUT_NONE ||
-          surf->msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED);
-
    /* CCS support does not exist prior to Gen7 */
    if (ISL_DEV_GEN(dev) <= 6)
       return false;