From: Andrew Zonenberg <azonenberg@drawersteak.com>
Date: Wed, 14 Dec 2016 23:19:08 +0000 (+0800)
Subject: greenpak4: More fixups of GP_DCMPx cells
X-Git-Tag: yosys-0.8~553^2^2~11
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3690aa556c5f1e51634fe2fc51cbffd174e76480;p=yosys.git

greenpak4: More fixups of GP_DCMPx cells
---

diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index 25a49ac06..cd5086951 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -132,18 +132,12 @@ module GP_DAC(input[7:0] DIN, input wire VREF, output reg VOUT);
 
 endmodule
 
-module GP_DCMPREF(output OUT);
+module GP_DCMPREF(output reg[7:0]OUT);
 	parameter[7:0] REF_VAL = 8'h00;
-	wire[7:0] OUT = REF_VAL;
+	initial OUT = REF_VAL;
 endmodule
 
-module GP_DCMPMUX(input SEL, input IN0, input IN1, input IN2, input IN3, output OUT);
-	wire[1:0] SEL;
-	wire[7:0] IN0;
-	wire[7:0] IN1;
-	wire[7:0] IN2;
-	wire[7:0] IN3;
-	reg[7:0] OUT;
+module GP_DCMPMUX(input[1:0] SEL, input[7:0] IN0, input[7:0] IN1, input[7:0] IN2, input[7:0] IN3, output reg[7:0] OUT);
 
 	always @(*) begin
 		case(SEL)