From: lkcl <lkcl@web>
Date: Thu, 26 May 2022 12:29:45 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2079
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=36b38deab6367a3d89637ae4556de799b615d4ac;p=libreriscv.git

---

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index e8b3de515..578a9b180 100644
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -339,7 +339,7 @@ the rounding mode is read from FPSCR
 
 This conversion, instead of exact IEEE754 Compliance, performs
 "saturation with NaN converted to minimum valid integer". This
-is also exactly the same as the x86 ISA conversion senantics.
+is also exactly the same as the x86 ISA conversion semantics.
 OpenPOWER however has instructions for both:
 
 * rounding mode read from FPSCR