From: Chad Versace <chad@chad-versace.us>
Date: Wed, 15 Jun 2011 00:38:30 +0000 (-0700)
Subject: intel: Unobfuscate intel_alloc_renderbuffer_storage
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=36e05c6870fc466053b4f54edd890e19d5ac9dcf;p=mesa.git

intel: Unobfuscate intel_alloc_renderbuffer_storage

Hiz buffer allocation can only occur if the 'else' branch has been taken,
so move the hiz buffer allocation into the 'else' branch.

Having the hiz buffer allocation dangling outside of the if-tree was just
damn confusing.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
---

diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index b48eac40008..ff09b5dc7e7 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -196,26 +196,26 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
 				       width,
 				       height / 2,
 				       GL_TRUE);
+      if (!irb->region)
+	return false;
+
    } else {
       irb->region = intel_region_alloc(intel->intelScreen, tiling, cpp,
 				       width, height, GL_TRUE);
-   }
-
-   if (!irb->region)
-      return GL_FALSE;       /* out of memory? */
-
-   ASSERT(irb->region->buffer);
-
-   if (intel->vtbl.is_hiz_depth_format(intel, rb->Format)) {
-      irb->hiz_region = intel_region_alloc(intel->intelScreen,
-                                           I915_TILING_Y,
-                                           irb->region->cpp,
-                                           irb->region->width,
-                                           irb->region->height,
-                                           GL_TRUE);
-      if (!irb->hiz_region) {
-         intel_region_release(&irb->region);
-         return GL_FALSE;
+      if (!irb->region)
+	 return false;
+
+      if (intel->vtbl.is_hiz_depth_format(intel, rb->Format)) {
+	 irb->hiz_region = intel_region_alloc(intel->intelScreen,
+					      I915_TILING_Y,
+					      irb->region->cpp,
+					      irb->region->width,
+					      irb->region->height,
+					      GL_TRUE);
+	 if (!irb->hiz_region) {
+	    intel_region_release(&irb->region);
+	    return false;
+	 }
       }
    }