From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 21 Jul 2018 08:38:15 +0000 (+0100)
Subject: add spi interface
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=379409074f4c4395eabf17404edf3233226f1f7b;p=pinmux.git

add spi interface
---

diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py
index e11bc08..0af60d0 100644
--- a/src/bsv/peripheral_gen.py
+++ b/src/bsv/peripheral_gen.py
@@ -264,6 +264,57 @@ class twi(PBase):
         return txt
 
 
+class spi(PBase):
+
+    def slowimport(self):
+        return "        import qspi              :: *;"
+
+    def slowifdecl(self):
+        return "            interface QSPI_out spi{0}_out;\n" + \
+               "            method Bit#(1) spi{0}_isint;"
+
+    def num_axi_regs32(self):
+        return 13
+
+    def mkslow_peripheral(self):
+        return "        Ifc_qspi spi{0} <-  mkqspi();"
+
+    def _mk_connection(self, name=None, count=0):
+        return "qspi{0}.slave"
+
+    def pinname_out(self, pname):
+        return {'clk': 'out.clk_o',
+                'nss': 'out.ncs_o',
+                'mosi': 'out.io_o[0]',
+                'miso': 'out.io_o[1]',
+                }.get(pname, '')
+
+    def pinname_outen(self, pname):
+        return {'ck': 1,
+                'nss': 1,
+                'mosi': 'out.io_enable[0]',
+                'miso': 'out.io_enable[1]',
+                }.get(pname, '')
+
+    def mk_pincon(self, name, count):
+        ret = [PBase.mk_pincon(self, name, count)]
+        # special-case for gpio in, store in a temporary vector
+        plen = len(self.peripheral.pinspecs)
+        ret.append("    // XXX NSS and CLK are hard-coded master")
+        ret.append("    // TODO: must add qspi slave-mode")
+        ret.append("    // all ins done in one rule from 4-bitfield")
+        ret.append("    rule con_%s%d_io_in;" % (name, count))
+        ret.append("       {0}{1}.out.io_i({{".format(name, count))
+        for idx, pname in enumerate(['mosi', 'miso']):
+            sname = self.peripheral.pname(pname).format(count)
+            ps = "pinmux.peripheral_side.%s_in" % sname
+            ret.append("            {0},".format(ps))
+        ret.append("            0,0")
+        ret.append("        });")
+        ret.append("    endrule")
+        return '\n'.join(ret)
+
+
 class qspi(PBase):
 
     def slowimport(self):
@@ -609,6 +660,7 @@ class PFactory(object):
                      'rs232': rs232,
                      'twi': twi,
                      'qspi': qspi,
+                     'spi': spi,
                      'pwm': pwm,
                      'gpio': gpio
                      }.items():