From: Andreas Sandberg <Andreas.Sandberg@ARM.com>
Date: Fri, 15 May 2015 17:39:44 +0000 (-0400)
Subject: sim: Don't clear the active CPU vector in System::initState
X-Git-Tag: stable_2015_09_03~41
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=37aab4a1558b223e63cee1e5dd40195ddb7851c0;p=gem5.git

sim: Don't clear the active CPU vector in System::initState

The system class currently clears the vector of active CPUs in
initState(). CPUs are added to the list by registerThreadContext()
which is called from BaseCPU::init(). This obviously breaks when the
System object is initialized after the CPUs. This changeset removes
the offending clear() call since the list will be empty after it has
been instantiated anyway.
---

diff --git a/src/sim/system.cc b/src/sim/system.cc
index 9bd487b03..2f2427769 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -302,8 +302,6 @@ System::initState()
             DPRINTF(Loader, "Kernel loaded...\n");
         }
     }
-
-    activeCpus.clear();
 }
 
 void