From: Luke Kenneth Casson Leighton Date: Fri, 23 Apr 2021 17:40:07 +0000 (+0100) Subject: use openpower.test.common X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=37f01b48d932de37236a0fc5f8ad216ebfdb6be3;p=soc.git use openpower.test.common --- diff --git a/src/soc/fu/alu/test/test_pipe_caller.py b/src/soc/fu/alu/test/test_pipe_caller.py index e117f9c1..51aa0e5d 100644 --- a/src/soc/fu/alu/test/test_pipe_caller.py +++ b/src/soc/fu/alu/test/test_pipe_caller.py @@ -1,7 +1,7 @@ import random from soc.fu.alu.pipe_data import ALUPipeSpec from soc.fu.alu.pipeline import ALUBasePipe -from soc.fu.test.common import (TestCase, TestAccumulatorBase, ALUHelpers) +from openpower.test.common import (TestCase, TestAccumulatorBase, ALUHelpers) from soc.config.endian import bigendian from openpower.decoder.isa.all import ISA from openpower.simulator.program import Program diff --git a/src/soc/fu/branch/test/test_pipe_caller.py b/src/soc/fu/branch/test/test_pipe_caller.py index f68374d1..221661f5 100644 --- a/src/soc/fu/branch/test/test_pipe_caller.py +++ b/src/soc/fu/branch/test/test_pipe_caller.py @@ -16,7 +16,7 @@ from openpower.decoder.isa.all import ISA from soc.regfile.regfiles import FastRegs from soc.config.endian import bigendian -from soc.fu.test.common import TestAccumulatorBase, TestCase, ALUHelpers +from openpower.test.common import TestAccumulatorBase, TestCase, ALUHelpers from soc.fu.branch.pipeline import BranchBasePipe from soc.fu.branch.pipe_data import BranchPipeSpec import random diff --git a/src/soc/fu/compunits/test/test_alu_compunit.py b/src/soc/fu/compunits/test/test_alu_compunit.py index 73f84ee9..5b00d324 100644 --- a/src/soc/fu/compunits/test/test_alu_compunit.py +++ b/src/soc/fu/compunits/test/test_alu_compunit.py @@ -4,7 +4,7 @@ from openpower.decoder.power_enums import (XER_bits, Function) from soc.fu.alu.test.test_pipe_caller import get_cu_inputs from soc.fu.alu.test.test_pipe_caller import ALUTestCase # creates the tests -from soc.fu.test.common import ALUHelpers +from openpower.test.common import ALUHelpers from soc.fu.compunits.compunits import ALUFunctionUnit from soc.fu.compunits.test.test_compunit import TestRunner from soc.config.endian import bigendian diff --git a/src/soc/fu/compunits/test/test_cr_compunit.py b/src/soc/fu/compunits/test/test_cr_compunit.py index 6dc3dfdc..b03ecd49 100644 --- a/src/soc/fu/compunits/test/test_cr_compunit.py +++ b/src/soc/fu/compunits/test/test_cr_compunit.py @@ -7,7 +7,7 @@ from soc.fu.cr.test.test_pipe_caller import CRTestCase from soc.fu.compunits.compunits import CRFunctionUnit from soc.fu.compunits.test.test_compunit import TestRunner -from soc.fu.test.common import mask_extend +from openpower.util import mask_extend from soc.config.endian import bigendian diff --git a/src/soc/fu/compunits/test/test_div_compunit.py b/src/soc/fu/compunits/test/test_div_compunit.py index 06375b15..3c7145e1 100644 --- a/src/soc/fu/compunits/test/test_div_compunit.py +++ b/src/soc/fu/compunits/test/test_div_compunit.py @@ -4,7 +4,7 @@ from openpower.decoder.power_enums import (XER_bits, Function) from soc.fu.div.test.test_pipe_caller import get_cu_inputs from soc.fu.div.test.test_pipe_caller import DivTestCases # creates the tests -from soc.fu.test.common import ALUHelpers +from openpower.test.common import ALUHelpers from soc.fu.compunits.compunits import DivFSMFunctionUnit from soc.fu.compunits.test.test_compunit import TestRunner from soc.config.endian import bigendian diff --git a/src/soc/fu/compunits/test/test_ldst_compunit.py b/src/soc/fu/compunits/test/test_ldst_compunit.py index b394a4fb..357ce983 100644 --- a/src/soc/fu/compunits/test/test_ldst_compunit.py +++ b/src/soc/fu/compunits/test/test_ldst_compunit.py @@ -5,7 +5,7 @@ from soc.fu.ldst.test.test_pipe_caller import LDSTTestCase, get_cu_inputs from soc.fu.compunits.compunits import LDSTFunctionUnit from soc.fu.compunits.test.test_compunit import TestRunner -from soc.fu.test.common import ALUHelpers +from openpower.test.common import ALUHelpers from soc.config.endian import bigendian diff --git a/src/soc/fu/compunits/test/test_logical_compunit.py b/src/soc/fu/compunits/test/test_logical_compunit.py index 947261ca..6a4c3cb7 100644 --- a/src/soc/fu/compunits/test/test_logical_compunit.py +++ b/src/soc/fu/compunits/test/test_logical_compunit.py @@ -6,7 +6,7 @@ from soc.fu.logical.test.test_pipe_caller import (LogicalTestCase, from soc.fu.compunits.compunits import LogicalFunctionUnit from soc.fu.compunits.test.test_compunit import TestRunner -from soc.fu.test.common import ALUHelpers +from openpower.test.common import ALUHelpers from soc.config.endian import bigendian diff --git a/src/soc/fu/compunits/test/test_spr_compunit.py b/src/soc/fu/compunits/test/test_spr_compunit.py index 3bdb90ea..bfc8a50d 100644 --- a/src/soc/fu/compunits/test/test_spr_compunit.py +++ b/src/soc/fu/compunits/test/test_spr_compunit.py @@ -4,7 +4,7 @@ from openpower.decoder.power_enums import (XER_bits, Function) from soc.fu.spr.test.test_pipe_caller import get_cu_inputs from soc.fu.spr.test.test_pipe_caller import SPRTestCase # creates the tests -from soc.fu.test.common import ALUHelpers +from openpower.test.common import ALUHelpers from soc.fu.compunits.compunits import SPRFunctionUnit from soc.fu.compunits.test.test_compunit import TestRunner from soc.config.endian import bigendian diff --git a/src/soc/fu/compunits/test/test_trap_compunit.py b/src/soc/fu/compunits/test/test_trap_compunit.py index 68300ab6..89f4ef66 100644 --- a/src/soc/fu/compunits/test/test_trap_compunit.py +++ b/src/soc/fu/compunits/test/test_trap_compunit.py @@ -4,7 +4,7 @@ from openpower.decoder.power_enums import (XER_bits, Function) from soc.fu.trap.test.test_pipe_caller import get_cu_inputs from soc.fu.trap.test.test_pipe_caller import TrapTestCase # creates the tests -from soc.fu.test.common import ALUHelpers +from openpower.test.common import ALUHelpers from soc.fu.compunits.compunits import TrapFunctionUnit from soc.fu.compunits.test.test_compunit import TestRunner from soc.config.endian import bigendian diff --git a/src/soc/fu/cr/test/test_pipe_caller.py b/src/soc/fu/cr/test/test_pipe_caller.py index ec783718..4501d281 100644 --- a/src/soc/fu/cr/test/test_pipe_caller.py +++ b/src/soc/fu/cr/test/test_pipe_caller.py @@ -15,8 +15,8 @@ from openpower.simulator.program import Program from openpower.decoder.isa.all import ISA from soc.config.endian import bigendian -from soc.fu.test.common import TestAccumulatorBase, TestCase, ALUHelpers -from soc.fu.test.common import mask_extend +from openpower.test.common import TestAccumulatorBase, TestCase, ALUHelpers +from openpower.util import mask_extend from soc.fu.cr.pipeline import CRBasePipe from soc.fu.cr.pipe_data import CRPipeSpec import random diff --git a/src/soc/fu/div/test/helper.py b/src/soc/fu/div/test/helper.py index 7c4f9d69..97da3f36 100644 --- a/src/soc/fu/div/test/helper.py +++ b/src/soc/fu/div/test/helper.py @@ -13,7 +13,7 @@ from openpower.decoder.power_enums import XER_bits, Function from openpower.decoder.isa.all import ISA from soc.config.endian import bigendian -from soc.fu.test.common import ALUHelpers +from openpower.test.common import ALUHelpers from soc.fu.test.pia import pia_res_to_output from soc.fu.div.pipeline import DivBasePipe from soc.fu.div.pipe_data import DivPipeSpec diff --git a/src/soc/fu/div/test/test_pipe_caller.py b/src/soc/fu/div/test/test_pipe_caller.py index 30dc414c..e6cebc50 100644 --- a/src/soc/fu/div/test/test_pipe_caller.py +++ b/src/soc/fu/div/test/test_pipe_caller.py @@ -3,7 +3,7 @@ import unittest from openpower.simulator.program import Program from soc.config.endian import bigendian -from soc.fu.test.common import (TestCase, TestAccumulatorBase, skip_case) +from openpower.test.common import (TestCase, TestAccumulatorBase, skip_case) from soc.fu.div.pipe_data import DivPipeKind from soc.fu.div.test.helper import (log_rand, get_cu_inputs, diff --git a/src/soc/fu/div/test/test_pipe_caller_long.py b/src/soc/fu/div/test/test_pipe_caller_long.py index 5d2970ca..c91d4d96 100644 --- a/src/soc/fu/div/test/test_pipe_caller_long.py +++ b/src/soc/fu/div/test/test_pipe_caller_long.py @@ -2,7 +2,7 @@ import unittest from openpower.simulator.program import Program from soc.config.endian import bigendian -from soc.fu.test.common import TestAccumulatorBase +from openpower.test.common import TestAccumulatorBase from soc.fu.div.test.helper import DivTestHelper from soc.fu.div.pipe_data import DivPipeKind diff --git a/src/soc/fu/ldst/test/test_pipe_caller.py b/src/soc/fu/ldst/test/test_pipe_caller.py index 0bffbb1c..d738fcb4 100644 --- a/src/soc/fu/ldst/test/test_pipe_caller.py +++ b/src/soc/fu/ldst/test/test_pipe_caller.py @@ -12,7 +12,7 @@ from openpower.decoder.isa.all import ISA from soc.config.endian import bigendian -from soc.fu.test.common import TestAccumulatorBase, TestCase +from openpower.test.common import TestAccumulatorBase, TestCase from soc.fu.ldst.pipe_data import LDSTPipeSpec import random diff --git a/src/soc/fu/logical/test/test_pipe_caller.py b/src/soc/fu/logical/test/test_pipe_caller.py index a6b87e3e..b11e182a 100644 --- a/src/soc/fu/logical/test/test_pipe_caller.py +++ b/src/soc/fu/logical/test/test_pipe_caller.py @@ -17,7 +17,7 @@ from openpower.decoder.isa.all import ISA from soc.config.endian import bigendian -from soc.fu.test.common import TestAccumulatorBase, TestCase, ALUHelpers +from openpower.test.common import TestAccumulatorBase, TestCase, ALUHelpers from soc.fu.logical.pipeline import LogicalBasePipe from soc.fu.logical.pipe_data import LogicalPipeSpec import random diff --git a/src/soc/fu/mmu/test/test_issuer_mmu_data_path.py b/src/soc/fu/mmu/test/test_issuer_mmu_data_path.py index 599b69a8..095f465b 100644 --- a/src/soc/fu/mmu/test/test_issuer_mmu_data_path.py +++ b/src/soc/fu/mmu/test/test_issuer_mmu_data_path.py @@ -4,7 +4,7 @@ from openpower.simulator.program import Program from soc.config.endian import bigendian import unittest -from soc.fu.test.common import ( +from openpower.test.common import ( TestAccumulatorBase, skip_case, TestCase, ALUHelpers) # this test case takes about half a minute to run on my Talos II diff --git a/src/soc/fu/mmu/test/test_issuer_mmu_rom.py b/src/soc/fu/mmu/test/test_issuer_mmu_rom.py index f1a80fc7..6044ad46 100644 --- a/src/soc/fu/mmu/test/test_issuer_mmu_rom.py +++ b/src/soc/fu/mmu/test/test_issuer_mmu_rom.py @@ -4,7 +4,7 @@ from openpower.simulator.program import Program from soc.config.endian import bigendian import unittest -from soc.fu.test.common import (TestAccumulatorBase, skip_case, TestCase, +from openpower.test.common import (TestAccumulatorBase, skip_case, TestCase, ALUHelpers) def b(x): diff --git a/src/soc/fu/mmu/test/test_non_production_core.py b/src/soc/fu/mmu/test/test_non_production_core.py index c498d71b..7c00c161 100644 --- a/src/soc/fu/mmu/test/test_non_production_core.py +++ b/src/soc/fu/mmu/test/test_non_production_core.py @@ -15,7 +15,7 @@ from soc.config.endian import bigendian from openpower.consts import MSR -from soc.fu.test.common import ( +from openpower.test.common import ( TestAccumulatorBase, skip_case, TestCase, ALUHelpers) import random diff --git a/src/soc/fu/mmu/test/test_pipe_caller.py b/src/soc/fu/mmu/test/test_pipe_caller.py index 24d39044..d62c8ae7 100644 --- a/src/soc/fu/mmu/test/test_pipe_caller.py +++ b/src/soc/fu/mmu/test/test_pipe_caller.py @@ -17,7 +17,7 @@ from soc.config.endian import bigendian from openpower.consts import MSR -from soc.fu.test.common import ( +from openpower.test.common import ( TestAccumulatorBase, skip_case, TestCase, ALUHelpers) #from soc.fu.spr.pipeline import SPRBasePipe #from soc.fu.spr.pipe_data import SPRPipeSpec diff --git a/src/soc/fu/mul/test/helper.py b/src/soc/fu/mul/test/helper.py index 140dd8fb..b7401828 100644 --- a/src/soc/fu/mul/test/helper.py +++ b/src/soc/fu/mul/test/helper.py @@ -17,7 +17,7 @@ from openpower.simulator.program import Program from openpower.decoder.isa.all import ISA from soc.config.endian import bigendian -from soc.fu.test.common import (TestAccumulatorBase, TestCase, ALUHelpers) +from openpower.test.common import (TestAccumulatorBase, TestCase, ALUHelpers) from soc.fu.test.pia import pia_res_to_output from soc.fu.mul.pipeline import MulBasePipe from soc.fu.mul.pipe_data import MulPipeSpec diff --git a/src/soc/fu/mul/test/test_pipe_caller.py b/src/soc/fu/mul/test/test_pipe_caller.py index e4f27f33..d57313b0 100644 --- a/src/soc/fu/mul/test/test_pipe_caller.py +++ b/src/soc/fu/mul/test/test_pipe_caller.py @@ -2,7 +2,7 @@ import unittest from soc.fu.mul.test.helper import MulTestHelper from openpower.simulator.program import Program from soc.config.endian import bigendian -from soc.fu.test.common import TestAccumulatorBase, skip_case +from openpower.test.common import TestAccumulatorBase, skip_case import random diff --git a/src/soc/fu/mul/test/test_pipe_caller_long.py b/src/soc/fu/mul/test/test_pipe_caller_long.py index 56d8795a..6a507c38 100644 --- a/src/soc/fu/mul/test/test_pipe_caller_long.py +++ b/src/soc/fu/mul/test/test_pipe_caller_long.py @@ -2,7 +2,7 @@ import unittest from soc.fu.mul.test.helper import MulTestHelper from openpower.simulator.program import Program from soc.config.endian import bigendian -from soc.fu.test.common import (TestAccumulatorBase) +from openpower.test.common import (TestAccumulatorBase) import random diff --git a/src/soc/fu/shift_rot/test/test_pipe_caller.py b/src/soc/fu/shift_rot/test/test_pipe_caller.py index fae3d029..e54179ed 100644 --- a/src/soc/fu/shift_rot/test/test_pipe_caller.py +++ b/src/soc/fu/shift_rot/test/test_pipe_caller.py @@ -2,7 +2,7 @@ import random from soc.fu.shift_rot.pipe_data import ShiftRotPipeSpec from soc.fu.alu.alu_input_record import CompALUOpSubset from soc.fu.shift_rot.pipeline import ShiftRotBasePipe -from soc.fu.test.common import TestAccumulatorBase, TestCase, ALUHelpers +from openpower.test.common import TestAccumulatorBase, TestCase, ALUHelpers from soc.config.endian import bigendian from openpower.decoder.isa.all import ISA from openpower.simulator.program import Program diff --git a/src/soc/fu/spr/test/test_pipe_caller.py b/src/soc/fu/spr/test/test_pipe_caller.py index 1f70041c..7b7290b1 100644 --- a/src/soc/fu/spr/test/test_pipe_caller.py +++ b/src/soc/fu/spr/test/test_pipe_caller.py @@ -17,7 +17,7 @@ from soc.config.endian import bigendian from openpower.consts import MSR -from soc.fu.test.common import ( +from openpower.test.common import ( TestAccumulatorBase, skip_case, TestCase, ALUHelpers) from soc.fu.spr.pipeline import SPRBasePipe from soc.fu.spr.pipe_data import SPRPipeSpec diff --git a/src/soc/fu/test/common.py b/src/soc/fu/test/common.py deleted file mode 100644 index c5b60697..00000000 --- a/src/soc/fu/test/common.py +++ /dev/null @@ -1,7 +0,0 @@ -# moved to openpower-isa -# https://git.libre-soc.org/?p=openpower-isa.git;a=summary -# wildcard imports here ONLY to support migration - -from openpower.test.common import * -from openpower.util import mask_extend - diff --git a/src/soc/fu/trap/test/test_pipe_caller.py b/src/soc/fu/trap/test/test_pipe_caller.py index b9cea5c5..994bdf50 100644 --- a/src/soc/fu/trap/test/test_pipe_caller.py +++ b/src/soc/fu/trap/test/test_pipe_caller.py @@ -17,7 +17,7 @@ from openpower.decoder.isa.all import ISA from soc.config.endian import bigendian from openpower.consts import MSR -from soc.fu.test.common import (TestAccumulatorBase, TestCase, ALUHelpers) +from openpower.test.common import (TestAccumulatorBase, TestCase, ALUHelpers) from soc.fu.trap.pipeline import TrapBasePipe from soc.fu.trap.pipe_data import TrapPipeSpec import random diff --git a/src/soc/simple/test/test_microwatt.py b/src/soc/simple/test/test_microwatt.py index a7af8328..b89867e4 100644 --- a/src/soc/simple/test/test_microwatt.py +++ b/src/soc/simple/test/test_microwatt.py @@ -1,5 +1,5 @@ from openpower.simulator.program import Program -from soc.fu.test.common import TestCase +from openpower.test.common import TestCase import unittest