From: enjoy-digital Date: Tue, 4 Aug 2020 13:38:28 +0000 (+0200) Subject: Merge pull request #619 from antmicro/jboc/sim-clocker X-Git-Tag: 24jan2021_ls180~32 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=382c1a3a441d44e8757b90eee9872b5a838d4957;p=litex.git Merge pull request #619 from antmicro/jboc/sim-clocker Allow to define multiple simulation clocks --- 382c1a3a441d44e8757b90eee9872b5a838d4957