From: lkcl <lkcl@web>
Date: Sun, 8 Aug 2021 10:26:33 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~463
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=38451c458e7ee7ddd971f43d65f4c67e1468bc00;p=libreriscv.git

---

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index e4cbd837a..e7315fa2d 100644
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -138,8 +138,9 @@ however which updates only CR0 with the testing of REMAP loop progress,
 the CR Field is taken from the branch `BI` field, and, if `BRc`
 is set, updated prior to
 proceeding to each element branch conditional testing.
-* This implies that the prior contents of the CR Vector are ignored*
-when `BRc` is set.
+This implies that the *prior contents of the CR Vector are entirely ignored*
+when `BRc` is set, which implies an opportunity to save on CR file
+reads.
 
 Note that, interestingly, due to the useful side-effects of `VLSET` mode
 and `svstep` mode it is actually useful to use Branch Conditional even