From: Iago Toral Quiroga <itoral@igalia.com>
Date: Mon, 19 Nov 2018 12:58:06 +0000 (+0100)
Subject: nir/from_ssa: fix bit-size of temporary register
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=387888e3b7c251548abe0eb641d2d795d4afd1d5;p=mesa.git

nir/from_ssa: fix bit-size of temporary register

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
---

diff --git a/src/compiler/nir/nir_from_ssa.c b/src/compiler/nir/nir_from_ssa.c
index e13c510c111..8419b28576b 100644
--- a/src/compiler/nir/nir_from_ssa.c
+++ b/src/compiler/nir/nir_from_ssa.c
@@ -707,10 +707,13 @@ resolve_parallel_copy(nir_parallel_copy_instr *pcopy,
       nir_register *reg = nir_local_reg_create(state->builder.impl);
       reg->name = "copy_temp";
       reg->num_array_elems = 0;
-      if (values[b].is_ssa)
+      if (values[b].is_ssa) {
          reg->num_components = values[b].ssa->num_components;
-      else
+         reg->bit_size = values[b].ssa->bit_size;
+      } else {
          reg->num_components = values[b].reg.reg->num_components;
+         reg->bit_size = values[b].reg.reg->bit_size;
+      }
       values[num_vals].is_ssa = false;
       values[num_vals].reg.reg = reg;