From: Anuj Phogat Date: Wed, 26 Jun 2019 21:23:35 +0000 (-0700) Subject: Revert "anv/icl: Add WA_2204188704 to disable pixel shader panic dispatch" X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=387e43b52fa2c17ae1cd3f95c7578407d9c4ef95;p=mesa.git Revert "anv/icl: Add WA_2204188704 to disable pixel shader panic dispatch" SLICE_COMMON_CHICKEN3 is a privileged register not accesible from userspace. This patch silences a simulator warning about it. We don't need to add this workaround in linux kernel as the WA description says it's fixed on latest stepping. This reverts commit 2be60e0c73ed1555a919c5725cc0cab119a2b6de. Signed-off-by: Anuj Phogat Reviewed-by: Kenneth Graunke Reviewed-by: Lionel Landwerlin --- diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c index 21b8cd648d4..c81de9156c7 100644 --- a/src/intel/vulkan/genX_state.c +++ b/src/intel/vulkan/genX_state.c @@ -200,18 +200,6 @@ genX(init_device_state)(struct anv_device *device) lri.DataDWord = half_slice_chicken7; } - /* WA_2204188704: Pixel Shader Panic dispatch must be disabled. - */ - uint32_t common_slice_chicken3; - anv_pack_struct(&common_slice_chicken3, GENX(COMMON_SLICE_CHICKEN3), - .PSThreadPanicDispatch = 0x3, - .PSThreadPanicDispatchMask = 0x3); - - anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) { - lri.RegisterOffset = GENX(COMMON_SLICE_CHICKEN3_num); - lri.DataDWord = common_slice_chicken3; - } - /* WaEnableStateCacheRedirectToCS:icl */ uint32_t slice_common_eco_chicken1; anv_pack_struct(&slice_common_eco_chicken1,