From: Luke Kenneth Casson Leighton Date: Sun, 9 Aug 2020 15:08:58 +0000 (+0100) Subject: delay go_st by one cycle, break combinatorial loop X-Git-Tag: semi_working_ecp5~417 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=38913e891dcd4a1c496a74c9d2fca903160321d9;p=soc.git delay go_st by one cycle, break combinatorial loop --- diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py index 168f389f..cfc0be48 100644 --- a/src/soc/simple/issuer.py +++ b/src/soc/simple/issuer.py @@ -106,7 +106,7 @@ class TestIssuer(Elaboratable): l0 = core.l0 ldst = core.fus.fus['ldst0'] m.d.comb += ldst.ad.go_i.eq(ldst.ad.rel_o) # link addr-go direct to rel - m.d.comb += ldst.st.go_i.eq(ldst.st.rel_o) # link store-go direct to rel + m.d.sync += ldst.st.go_i.eq(ldst.st.rel_o) # link store-go direct to rel # PC and instruction from I-Memory current_insn = Signal(32) # current fetched instruction (note sync)