From: Alan Hourihane Date: Tue, 14 Dec 2004 09:11:52 +0000 (+0000) Subject: uint*t -> u_int*t changes X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=38b317d508a2a3a4cc6d700ebca80c3b06c913e2;p=mesa.git uint*t -> u_int*t changes --- diff --git a/include/GL/glxext.h b/include/GL/glxext.h index f1e253a0c77..880f2f30f04 100644 --- a/include/GL/glxext.h +++ b/include/GL/glxext.h @@ -331,6 +331,15 @@ typedef struct { } GLXBufferClobberEventSGIX; #endif +#if defined(__UNIXOS2__) || defined(__SOL64__) +typedef long int int32_t; +typedef long long int int64_t; +#endif + +#if defined(__SCO__) || defined(__USLC__) +#include +#endif + #ifndef GLX_VERSION_1_3 #define GLX_VERSION_1_3 1 #ifdef GLX_GLXEXT_PROTOTYPES @@ -597,11 +606,6 @@ typedef Bool ( * PFNGLXSET3DFXMODEMESAPROC) (int mode); #ifndef GLX_OML_sync_control #define GLX_OML_sync_control 1 -#if defined(__STDC_VERSION__) -#if __STDC_VERSION__ >= 199901L -/* Include ISO C99 integer types for OML_sync_control; need a better test */ -#include - #ifdef GLX_GLXEXT_PROTOTYPES extern Bool glXGetSyncValuesOML (Display *, GLXDrawable, int64_t *, int64_t *, int64_t *); extern Bool glXGetMscRateOML (Display *, GLXDrawable, int32_t *, int32_t *); @@ -614,8 +618,6 @@ typedef Bool ( * PFNGLXGETMSCRATEOMLPROC) (Display *dpy, GLXDrawable drawable, i typedef int64_t ( * PFNGLXSWAPBUFFERSMSCOMLPROC) (Display *dpy, GLXDrawable drawable, int64_t target_msc, int64_t divisor, int64_t remainder); typedef Bool ( * PFNGLXWAITFORMSCOMLPROC) (Display *dpy, GLXDrawable drawable, int64_t target_msc, int64_t divisor, int64_t remainder, int64_t *ust, int64_t *msc, int64_t *sbc); typedef Bool ( * PFNGLXWAITFORSBCOMLPROC) (Display *dpy, GLXDrawable drawable, int64_t target_sbc, int64_t *ust, int64_t *msc, int64_t *sbc); -#endif /* C99 version test */ -#endif /* STDC test */ #endif #ifndef GLX_SGIX_hyperpipe_group @@ -673,7 +675,6 @@ extern unsigned int glXGetAGPOffsetMESA (const void *); typedef unsigned int ( * PFNGLXGETAGPOFFSETMESAPROC) (const void *pointer); #endif - #ifdef __cplusplus } #endif diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c index 88caa34e946..33facbbf6c6 100644 --- a/src/mesa/drivers/dri/common/dri_util.c +++ b/src/mesa/drivers/dri/common/dri_util.c @@ -27,13 +27,16 @@ #ifdef GLX_DIRECT_RENDERING -#include #include #include #include #include #include +#ifndef MAP_FAILED +#define MAP_FAILED ((void *)-1) +#endif + #ifndef DRI_NEW_INTERFACE_ONLY # include # include diff --git a/src/mesa/drivers/dri/common/dri_util.h b/src/mesa/drivers/dri/common/dri_util.h index f85a2fb68e1..534a26785ef 100644 --- a/src/mesa/drivers/dri/common/dri_util.h +++ b/src/mesa/drivers/dri/common/dri_util.h @@ -53,7 +53,6 @@ #define CAPI /* XXX this should be globally defined somewhere */ -#include #ifdef DRI_NEW_INTERFACE_ONLY # include #else @@ -208,7 +207,7 @@ struct __DRIswapInfoRec { /** * Number of swapBuffers operations that have been *completed*. */ - uint64_t swap_count; + u_int64_t swap_count; /** * Unadjusted system time of the last buffer swap. This is the time @@ -222,7 +221,7 @@ struct __DRIswapInfoRec { * swap, it has missed its deadline. If swap_interval is 0, then the * swap deadline is 1 frame after the previous swap. */ - uint64_t swap_missed_count; + u_int64_t swap_missed_count; /** * Amount of time used by the last swap that missed its deadline. This diff --git a/src/mesa/drivers/dri/common/mmio.h b/src/mesa/drivers/dri/common/mmio.h index 1418543dc53..a9bdce42bf9 100644 --- a/src/mesa/drivers/dri/common/mmio.h +++ b/src/mesa/drivers/dri/common/mmio.h @@ -33,15 +33,13 @@ #ifndef MMIO_H #define MMIO_H -#include - #if defined( __powerpc__ ) -static __inline__ uint32_t +static __inline__ u_int32_t read_MMIO_LE32( volatile void * base, unsigned long offset ) { volatile void * p = ((volatile char *) base) + offset; - uint32_t val; + u_int32_t val; __asm__ __volatile__( "lwbrx %0, %1, %2 ; eieio" : "=r" (val) @@ -51,10 +49,10 @@ read_MMIO_LE32( volatile void * base, unsigned long offset ) #else -static __inline__ uint32_t +static __inline__ u_int32_t read_MMIO_LE32( volatile void * base, unsigned long offset ) { - volatile uint32_t * p = (volatile uint32_t *) (((volatile char *) base) + offset); + volatile u_int32_t * p = (volatile u_int32_t *) (((volatile char *) base) + offset); return LE32_TO_CPU( p[0] ); } diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c index 0e8e54a2028..fcdd9f83777 100644 --- a/src/mesa/drivers/dri/common/utils.c +++ b/src/mesa/drivers/dri/common/utils.c @@ -415,12 +415,12 @@ GLboolean driClipRectToFramebuffer( const GLframebuffer *buffer, GLboolean driFillInModes( __GLcontextModes ** ptr_to_modes, GLenum fb_format, GLenum fb_type, - const uint8_t * depth_bits, const uint8_t * stencil_bits, + const u_int8_t * depth_bits, const u_int8_t * stencil_bits, unsigned num_depth_stencil_bits, const GLenum * db_modes, unsigned num_db_modes, int visType ) { - static const uint8_t bits_table[3][4] = { + static const u_int8_t bits_table[3][4] = { /* R G B A */ { 5, 6, 5, 0 }, /* Any GL_UNSIGNED_SHORT_5_6_5 */ { 8, 8, 8, 0 }, /* Any RGB with any GL_UNSIGNED_INT_8_8_8_8 */ @@ -431,7 +431,7 @@ driFillInModes( __GLcontextModes ** ptr_to_modes, * Given the four supported fb_type values, this results in valid array * indices of 3, 4, 5, and 7. */ - static const uint32_t masks_table_rgb[8][4] = { + static const u_int32_t masks_table_rgb[8][4] = { { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, @@ -442,7 +442,7 @@ driFillInModes( __GLcontextModes ** ptr_to_modes, { 0x000000FF, 0x0000FF00, 0x00FF0000, 0x00000000 } /* 8_8_8_8_REV */ }; - static const uint32_t masks_table_rgba[8][4] = { + static const u_int32_t masks_table_rgba[8][4] = { { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, @@ -453,7 +453,7 @@ driFillInModes( __GLcontextModes ** ptr_to_modes, { 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000 }, /* 8_8_8_8_REV */ }; - static const uint32_t masks_table_bgr[8][4] = { + static const u_int32_t masks_table_bgr[8][4] = { { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, @@ -464,7 +464,7 @@ driFillInModes( __GLcontextModes ** ptr_to_modes, { 0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000 }, /* 8_8_8_8_REV */ }; - static const uint32_t masks_table_bgra[8][4] = { + static const u_int32_t masks_table_bgra[8][4] = { { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, @@ -475,12 +475,12 @@ driFillInModes( __GLcontextModes ** ptr_to_modes, { 0x00FF0000, 0x0000FF00, 0x000000FF, 0xFF000000 }, /* 8_8_8_8_REV */ }; - static const uint8_t bytes_per_pixel[8] = { + static const u_int8_t bytes_per_pixel[8] = { 0, 0, 0, 2, 2, 4, 0, 4 }; - const uint8_t * bits; - const uint32_t * masks; + const u_int8_t * bits; + const u_int32_t * masks; const int index = fb_type & 0x07; __GLcontextModes * modes = *ptr_to_modes; unsigned i; @@ -490,7 +490,7 @@ driFillInModes( __GLcontextModes ** ptr_to_modes, if ( bytes_per_pixel[ index ] == 0 ) { fprintf( stderr, "[%s:%u] Framebuffer type 0x%04x has 0 bytes per pixel.\n", - __func__, __LINE__, fb_type ); + __FUNCTION__, __LINE__, fb_type ); return GL_FALSE; } @@ -528,7 +528,7 @@ driFillInModes( __GLcontextModes ** ptr_to_modes, default: fprintf( stderr, "[%s:%u] Framebuffer format 0x%04x is not GL_RGB, GL_RGBA, GL_BGR, or GL_BGRA.\n", - __func__, __LINE__, fb_format ); + __FUNCTION__, __LINE__, fb_format ); return GL_FALSE; } diff --git a/src/mesa/drivers/dri/common/utils.h b/src/mesa/drivers/dri/common/utils.h index 3eaf13f4cab..21d7ad269d4 100644 --- a/src/mesa/drivers/dri/common/utils.h +++ b/src/mesa/drivers/dri/common/utils.h @@ -64,7 +64,7 @@ extern GLboolean driClipRectToFramebuffer( const GLframebuffer *buffer, extern GLboolean driFillInModes( __GLcontextModes ** modes, GLenum fb_format, GLenum fb_type, - const uint8_t * depth_bits, const uint8_t * stencil_bits, + const u_int8_t * depth_bits, const u_int8_t * stencil_bits, unsigned num_depth_stencil_bits, const GLenum * db_modes, unsigned num_db_modes, int visType ); diff --git a/src/mesa/drivers/dri/gamma/gamma_context.h b/src/mesa/drivers/dri/gamma/gamma_context.h index 4572a0224d2..6dd458bc95c 100644 --- a/src/mesa/drivers/dri/gamma/gamma_context.h +++ b/src/mesa/drivers/dri/gamma/gamma_context.h @@ -160,13 +160,13 @@ struct gamma_texture_object_t { int internalFormat; } image[GAMMA_TEX_MAXLEVELS]; - uint32_t TextureBaseAddr[GAMMA_TEX_MAXLEVELS]; - uint32_t TextureAddressMode; - uint32_t TextureColorMode; - uint32_t TextureFilterMode; - uint32_t TextureFormat; - uint32_t TextureReadMode; - uint32_t TextureBorderColor; + u_int32_t TextureBaseAddr[GAMMA_TEX_MAXLEVELS]; + u_int32_t TextureAddressMode; + u_int32_t TextureColorMode; + u_int32_t TextureFilterMode; + u_int32_t TextureFormat; + u_int32_t TextureReadMode; + u_int32_t TextureBorderColor; }; #define GAMMA_NO_PALETTE 0x0 @@ -300,18 +300,18 @@ struct gamma_context { unsigned int lastStamp; - uint32_t ClearColor; - uint32_t Color; - uint32_t DitherMode; - uint32_t ClearDepth; - uint32_t FogMode; - uint32_t AreaStippleMode; - uint32_t LBReadFormat; - uint32_t LBWriteFormat; - uint32_t LineMode; - uint32_t PointMode; - uint32_t TriangleMode; - uint32_t AntialiasMode; + u_int32_t ClearColor; + u_int32_t Color; + u_int32_t DitherMode; + u_int32_t ClearDepth; + u_int32_t FogMode; + u_int32_t AreaStippleMode; + u_int32_t LBReadFormat; + u_int32_t LBWriteFormat; + u_int32_t LineMode; + u_int32_t PointMode; + u_int32_t TriangleMode; + u_int32_t AntialiasMode; GLfloat ViewportScaleX; GLfloat ViewportScaleY; GLfloat ViewportScaleZ; diff --git a/src/mesa/drivers/dri/gamma/gamma_render.c b/src/mesa/drivers/dri/gamma/gamma_render.c index ce8b83934c9..4e0d63791d2 100644 --- a/src/mesa/drivers/dri/gamma/gamma_render.c +++ b/src/mesa/drivers/dri/gamma/gamma_render.c @@ -74,7 +74,7 @@ static void gamma_emit( GLcontext *ctx, GLuint start, GLuint end) WRITEF(gmesa->buf, Tr4, tc0[i][2]); WRITEF(gmesa->buf, Tt4, tc0[i][0]); WRITEF(gmesa->buf, Ts4, tc0[i][1]); - WRITE(gmesa->buf, PackedColor4, *(uint32_t*)col[i]); + WRITE(gmesa->buf, PackedColor4, *(u_int32_t*)col[i]); WRITEF(gmesa->buf, Vw, coord[i][3]); WRITEF(gmesa->buf, Vz, coord[i][2]); WRITEF(gmesa->buf, Vy, coord[i][1]); @@ -85,7 +85,7 @@ static void gamma_emit( GLcontext *ctx, GLuint start, GLuint end) CHECK_DMA_BUFFER(gmesa, 7); WRITEF(gmesa->buf, Tt2, tc0[i][0]); WRITEF(gmesa->buf, Ts2, tc0[i][1]); - WRITE(gmesa->buf, PackedColor4, *(uint32_t*)col[i]); + WRITE(gmesa->buf, PackedColor4, *(u_int32_t*)col[i]); WRITEF(gmesa->buf, Vw, coord[i][3]); WRITEF(gmesa->buf, Vz, coord[i][2]); WRITEF(gmesa->buf, Vy, coord[i][1]); @@ -94,7 +94,7 @@ static void gamma_emit( GLcontext *ctx, GLuint start, GLuint end) } else { for (i=start; i < end; i++) { CHECK_DMA_BUFFER(gmesa, 4); - WRITE(gmesa->buf, PackedColor4, *(uint32_t*)col[i]); + WRITE(gmesa->buf, PackedColor4, *(u_int32_t*)col[i]); WRITEF(gmesa->buf, Vz, coord[i][2]); WRITEF(gmesa->buf, Vy, coord[i][1]); WRITEF(gmesa->buf, Vx3, coord[i][0]); diff --git a/src/mesa/drivers/dri/gamma/gamma_span.c b/src/mesa/drivers/dri/gamma/gamma_span.c index 533166ddbb3..2cf0d49efbe 100644 --- a/src/mesa/drivers/dri/gamma/gamma_span.c +++ b/src/mesa/drivers/dri/gamma/gamma_span.c @@ -207,10 +207,10 @@ static void gammaReadRGBASpan8888( const GLcontext *ctx, { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); gammaScreenPtr gammascrn = gmesa->gammaScreen; - uint32_t dwords1, dwords2, i = 0; + u_int32_t dwords1, dwords2, i = 0; char *src = (char *)rgba[0]; GLuint read = n * gammascrn->cpp; /* Number of bytes we are expecting */ - uint32_t data; + u_int32_t data; FLUSH_DMA_BUFFER(gmesa); CHECK_DMA_BUFFER(gmesa, 16); @@ -232,8 +232,8 @@ static void gammaReadRGBASpan8888( const GLcontext *ctx, moredata: - dwords1 = *(volatile uint32_t*)(void *)(((uint8_t*)gammascrn->regions[0].map) + (GlintOutFIFOWords)); - dwords2 = *(volatile uint32_t*)(void *)(((uint8_t*)gammascrn->regions[2].map) + (GlintOutFIFOWords)); + dwords1 = *(volatile u_int32_t*)(void *)(((u_int8_t*)gammascrn->regions[0].map) + (GlintOutFIFOWords)); + dwords2 = *(volatile u_int32_t*)(void *)(((u_int8_t*)gammascrn->regions[2].map) + (GlintOutFIFOWords)); if (dwords1) { memcpy(src, (char*)gammascrn->regions[1].map + 0x1000, dwords1 << 2); diff --git a/src/mesa/drivers/dri/gamma/gamma_state.c b/src/mesa/drivers/dri/gamma/gamma_state.c index 29f1a57959f..4d9d92fdb66 100644 --- a/src/mesa/drivers/dri/gamma/gamma_state.c +++ b/src/mesa/drivers/dri/gamma/gamma_state.c @@ -45,9 +45,9 @@ static void gammaUpdateAlphaMode( GLcontext *ctx ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - uint32_t a = gmesa->AlphaTestMode; - uint32_t b = gmesa->AlphaBlendMode; - uint32_t f = gmesa->AB_FBReadMode_Save = 0; + u_int32_t a = gmesa->AlphaTestMode; + u_int32_t b = gmesa->AlphaBlendMode; + u_int32_t f = gmesa->AB_FBReadMode_Save = 0; GLubyte refByte = (GLint) (ctx->Color.AlphaRef * 255.0); a &= ~(AT_CompareMask | AT_RefValueMask); @@ -420,10 +420,10 @@ static void gammaDDClear( GLcontext *ctx, GLbitfield mask, GLboolean all, static void gammaUpdateZMode( GLcontext *ctx ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - uint32_t z = gmesa->DepthMode; - uint32_t delta = gmesa->DeltaMode; - uint32_t window = gmesa->Window; - uint32_t lbread = gmesa->LBReadMode; + u_int32_t z = gmesa->DepthMode; + u_int32_t delta = gmesa->DeltaMode; + u_int32_t window = gmesa->Window; + u_int32_t lbread = gmesa->LBReadMode; z &= ~DM_CompareMask; @@ -539,9 +539,9 @@ static void gammaDDFlush( GLcontext *ctx ) static void gammaUpdateFogAttrib( GLcontext *ctx ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - uint32_t f = gmesa->FogMode; - uint32_t g = gmesa->GeometryMode; - uint32_t d = gmesa->DeltaMode; + u_int32_t f = gmesa->FogMode; + u_int32_t g = gmesa->GeometryMode; + u_int32_t d = gmesa->DeltaMode; if (ctx->Fog.Enabled) { f |= FogModeEnable; @@ -637,7 +637,7 @@ static void gammaDDPointSize( GLcontext *ctx, GLfloat size ) static void gammaUpdatePolygon( GLcontext *ctx ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - uint32_t g = gmesa->GeometryMode; + u_int32_t g = gmesa->GeometryMode; g &= ~(GM_PolyOffsetFillEnable | GM_PolyOffsetPointEnable | GM_PolyOffsetLineEnable); @@ -755,7 +755,7 @@ static void gammaDDScissor( GLcontext *ctx, static void gammaUpdateCull( GLcontext *ctx ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - uint32_t g = gmesa->GeometryMode; + u_int32_t g = gmesa->GeometryMode; g &= ~(GM_PolyCullMask | GM_FFMask); @@ -975,8 +975,8 @@ static void gammaDDLightModelfv( GLcontext *ctx, GLenum pname, static void gammaDDShadeModel( GLcontext *ctx, GLenum mode ) { gammaContextPtr gmesa = GAMMA_CONTEXT(ctx); - uint32_t g = gmesa->GeometryMode; - uint32_t c = gmesa->ColorDDAMode; + u_int32_t g = gmesa->GeometryMode; + u_int32_t c = gmesa->ColorDDAMode; g &= ~GM_ShadingMask; c &= ~ColorDDAShadingMask; @@ -1245,7 +1245,7 @@ static void gammaDDEnable( GLcontext *ctx, GLenum cap, GLboolean state ) case GL_DITHER: do { - uint32_t d = gmesa->DitherMode; + u_int32_t d = gmesa->DitherMode; FLUSH_BATCH( gmesa ); if ( state ) { @@ -1277,7 +1277,7 @@ static void gammaDDEnable( GLcontext *ctx, GLenum cap, GLboolean state ) #if ENABLELIGHTING case GL_LIGHTING: do { - uint32_t l = gmesa->LightingMode; + u_int32_t l = gmesa->LightingMode; FLUSH_BATCH( gmesa ); if ( state ) { @@ -1295,7 +1295,7 @@ static void gammaDDEnable( GLcontext *ctx, GLenum cap, GLboolean state ) case GL_COLOR_MATERIAL: do { - uint32_t m = gmesa->MaterialMode; + u_int32_t m = gmesa->MaterialMode; FLUSH_BATCH( gmesa ); if ( state ) { diff --git a/src/mesa/drivers/dri/gamma/gamma_tex.c b/src/mesa/drivers/dri/gamma/gamma_tex.c index 075d6d1357b..d4fc93f86b5 100644 --- a/src/mesa/drivers/dri/gamma/gamma_tex.c +++ b/src/mesa/drivers/dri/gamma/gamma_tex.c @@ -32,8 +32,8 @@ static GLuint gammaComputeLodBias(GLfloat bias) static void gammaSetTexWrapping(gammaTextureObjectPtr t, GLenum wraps, GLenum wrapt) { - uint32_t t1 = t->TextureAddressMode; - uint32_t t2 = t->TextureReadMode; + u_int32_t t1 = t->TextureAddressMode; + u_int32_t t2 = t->TextureReadMode; t1 &= ~(TAM_SWrap_Mask | TAM_TWrap_Mask); t2 &= ~(TRM_UWrap_Mask | TRM_VWrap_Mask); @@ -58,8 +58,8 @@ static void gammaSetTexFilter(gammaContextPtr gmesa, GLenum minf, GLenum magf, GLfloat bias) { - uint32_t t1 = t->TextureAddressMode; - uint32_t t2 = t->TextureReadMode; + u_int32_t t1 = t->TextureAddressMode; + u_int32_t t2 = t->TextureReadMode; t2 &= ~(TRM_Mag_Mask | TRM_Min_Mask); @@ -376,6 +376,7 @@ static GLboolean gammaIsTextureResident( GLcontext *ctx, return t && t->MemBlock; } +#ifdef UNUSED /** * Allocate a new texture object. * Called via ctx->Driver.NewTextureObject. @@ -391,6 +392,7 @@ gammaNewTextureObject( GLcontext *ctx, GLuint name, GLenum target ) obj = _mesa_new_texture_object(ctx, name, target); return obj; } +#endif void gammaInitTextureObjects( GLcontext *ctx ) { diff --git a/src/mesa/drivers/dri/gamma/gamma_tritmp.h b/src/mesa/drivers/dri/gamma/gamma_tritmp.h index d61d45b25f0..23459ff156e 100644 --- a/src/mesa/drivers/dri/gamma/gamma_tritmp.h +++ b/src/mesa/drivers/dri/gamma/gamma_tritmp.h @@ -1,8 +1,10 @@ +/* $XFree86: xc/extras/Mesa/src/mesa/drivers/dri/gamma/gamma_tritmp.h,v 1.2 2004/12/13 22:40:49 tsi Exp $ */ + static void TAG(gamma_point)( gammaContextPtr gmesa, const gammaVertex *v0 ) { - uint32_t vColor; - uint32_t vBegin; + u_int32_t vColor; + u_int32_t vBegin; vBegin = gmesa->Begin | B_PrimType_Points; @@ -55,8 +57,8 @@ static void TAG(gamma_line)( gammaContextPtr gmesa, const gammaVertex *v0, const gammaVertex *v1 ) { - uint32_t vColor; - uint32_t vBegin; + u_int32_t vColor; + u_int32_t vBegin; vBegin = gmesa->Begin | B_PrimType_Lines; @@ -164,8 +166,8 @@ static void TAG(gamma_triangle)( gammaContextPtr gmesa, const gammaVertex *v1, const gammaVertex *v2 ) { - uint32_t vColor; - uint32_t vBegin; + u_int32_t vColor; + u_int32_t vBegin; vBegin = gmesa->Begin | B_PrimType_Triangles; @@ -309,8 +311,8 @@ static void TAG(gamma_quad)( gammaContextPtr gmesa, const gammaVertex *v2, const gammaVertex *v3 ) { - uint32_t vColor; - uint32_t vBegin; + u_int32_t vColor; + u_int32_t vBegin; vBegin = gmesa->Begin | B_PrimType_Quads; diff --git a/src/mesa/drivers/dri/i810/i810screen.c b/src/mesa/drivers/dri/i810/i810screen.c index f87a205f202..27a2c7cba7f 100644 --- a/src/mesa/drivers/dri/i810/i810screen.c +++ b/src/mesa/drivers/dri/i810/i810screen.c @@ -64,11 +64,11 @@ static __GLcontextModes *fill_in_modes( __GLcontextModes *modes, unsigned num_db_modes, int visType ) { - static const uint8_t bits[1][4] = { + static const u_int8_t bits[1][4] = { { 5, 6, 5, 0 } }; - static const uint32_t masks[1][4] = { + static const u_int32_t masks[1][4] = { { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 } }; diff --git a/src/mesa/drivers/dri/i830/i830_screen.c b/src/mesa/drivers/dri/i830/i830_screen.c index f323baccbfa..b31e81898b6 100644 --- a/src/mesa/drivers/dri/i830/i830_screen.c +++ b/src/mesa/drivers/dri/i830/i830_screen.c @@ -394,8 +394,8 @@ i830FillInModes( unsigned pixel_bits, unsigned depth_bits, GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML }; - uint8_t depth_bits_array[2]; - uint8_t stencil_bits_array[2]; + u_int8_t depth_bits_array[2]; + u_int8_t stencil_bits_array[2]; depth_bits_array[0] = 0; diff --git a/src/mesa/drivers/dri/i915/i830_state.c b/src/mesa/drivers/dri/i915/i830_state.c index c9d03296026..a5ebc9e2aa0 100644 --- a/src/mesa/drivers/dri/i915/i830_state.c +++ b/src/mesa/drivers/dri/i915/i830_state.c @@ -403,7 +403,7 @@ static void i830_set_blend_state( GLcontext * ctx ) break; default: fprintf( stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n", - __func__, __LINE__, ctx->Color.BlendEquationRGB ); + __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB ); return; } @@ -431,7 +431,7 @@ static void i830_set_blend_state( GLcontext * ctx ) break; default: fprintf( stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n", - __func__, __LINE__, ctx->Color.BlendEquationA ); + __FUNCTION__, __LINE__, ctx->Color.BlendEquationA ); return; } @@ -465,7 +465,7 @@ static void i830_set_blend_state( GLcontext * ctx ) if (0) { fprintf(stderr, "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n", - __func__, __LINE__, + __FUNCTION__, __LINE__, i830->state.Ctx[I830_CTXREG_STATE1], i830->state.Ctx[I830_CTXREG_IALPHAB], (ctx->Color.BlendEnabled) ? "en" : "dis"); diff --git a/src/mesa/drivers/dri/i915/i830_texblend.c b/src/mesa/drivers/dri/i915/i830_texblend.c index b1500227134..49e0347643c 100644 --- a/src/mesa/drivers/dri/i915/i830_texblend.c +++ b/src/mesa/drivers/dri/i915/i830_texblend.c @@ -161,12 +161,6 @@ i830SetTexEnvCombine(i830ContextPtr i830, TEXPIPE_ALPHA | TEXBLEND_ARG2 | TEXBLENDARG_MODIFY_PARMS, TEXPIPE_ALPHA | TEXBLEND_ARG0 | TEXBLENDARG_MODIFY_PARMS, }; - static const GLuint op_rgb[4] = { - 0, - TEXBLENDARG_INV_ARG, - TEXBLENDARG_REPLICATE_ALPHA, - TEXBLENDARG_REPLICATE_ALPHA | TEXBLENDARG_INV_ARG, - }; if(INTEL_DEBUG&DEBUG_TEXTURE) fprintf(stderr, "%s\n", __FUNCTION__); @@ -404,8 +398,6 @@ static void emit_texblend( i830ContextPtr i830, GLuint unit, GLuint blendUnit, GLboolean last_stage ) { struct gl_texture_unit *texUnit = &i830->intel.ctx.Texture.Unit[unit]; - struct gl_texture_object *tObj = texUnit->_Current; - i830TextureObjectPtr t = (i830TextureObjectPtr)tObj->DriverData; GLuint tmp[I830_TEXBLEND_SIZE], tmp_sz; diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c index 2c2665d00cd..40e118ec414 100644 --- a/src/mesa/drivers/dri/i915/i915_fragprog.c +++ b/src/mesa/drivers/dri/i915/i915_fragprog.c @@ -42,7 +42,7 @@ - +#undef PI #define PI 3.141592 diff --git a/src/mesa/drivers/dri/i915/intel_context.h b/src/mesa/drivers/dri/i915/intel_context.h index 625e96f580f..be941fd3002 100644 --- a/src/mesa/drivers/dri/i915/intel_context.h +++ b/src/mesa/drivers/dri/i915/intel_context.h @@ -357,7 +357,7 @@ do { \ * From linux kernel i386 header files, copes with odd sizes better * than COPY_DWORDS would: */ -#ifdef __i386__ +#if defined(i386) || defined(__i386__) static __inline__ void * __memcpy(void * to, const void * from, size_t n) { int d0, d1, d2; diff --git a/src/mesa/drivers/dri/i915/intel_ioctl.c b/src/mesa/drivers/dri/i915/intel_ioctl.c index db6d2cd2dda..b2e72efac1f 100644 --- a/src/mesa/drivers/dri/i915/intel_ioctl.c +++ b/src/mesa/drivers/dri/i915/intel_ioctl.c @@ -107,7 +107,7 @@ void intel_dump_batchbuffer( long offset, int i; fprintf(stderr, "\n\n\nSTART BATCH (%d dwords):\n", count); for (i = 0; i < count/4; i += 4) - fprintf(stderr, "\t0x%x: 0x%08x 0x%08x 0x%08x 0x%08x\n", + fprintf(stderr, "\t0x%lx: 0x%08x 0x%08x 0x%08x 0x%08x\n", offset + i*4, ptr[i], ptr[i+1], ptr[i+2], ptr[i+3]); fprintf(stderr, "END BATCH\n\n\n"); } @@ -247,7 +247,7 @@ void intelFlushBatchLocked( intelContextPtr intel, } } else { drmI830CmdBuffer cmd; - cmd.buf = intel->alloc.ptr + batch.start; + cmd.buf = (GLubyte *)intel->alloc.ptr + batch.start; cmd.sz = batch.used; cmd.DR1 = batch.DR1; cmd.DR4 = batch.DR4; diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c index 8007ff48c2e..0da5f8d7d88 100644 --- a/src/mesa/drivers/dri/i915/intel_screen.c +++ b/src/mesa/drivers/dri/i915/intel_screen.c @@ -355,8 +355,8 @@ intelFillInModes( unsigned pixel_bits, unsigned depth_bits, GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML }; - uint8_t depth_bits_array[2]; - uint8_t stencil_bits_array[2]; + u_int8_t depth_bits_array[2]; + u_int8_t stencil_bits_array[2]; depth_bits_array[0] = 0; diff --git a/src/mesa/drivers/dri/mach64/mach64_screen.c b/src/mesa/drivers/dri/mach64/mach64_screen.c index a6cb8b95db3..0c033c55ea4 100644 --- a/src/mesa/drivers/dri/mach64/mach64_screen.c +++ b/src/mesa/drivers/dri/mach64/mach64_screen.c @@ -76,12 +76,12 @@ static __GLcontextModes * fill_in_modes( __GLcontextModes * modes, unsigned num_db_modes, int visType ) { - static const uint8_t bits[2][4] = { + static const u_int8_t bits[2][4] = { { 5, 6, 5, 0 }, { 8, 8, 8, 0 } }; - static const uint32_t masks[2][4] = { + static const u_int32_t masks[2][4] = { { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, { 0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000 } }; diff --git a/src/mesa/drivers/dri/mga/mga_xmesa.c b/src/mesa/drivers/dri/mga/mga_xmesa.c index 6fcef0c4488..476756dba31 100644 --- a/src/mesa/drivers/dri/mga/mga_xmesa.c +++ b/src/mesa/drivers/dri/mga/mga_xmesa.c @@ -113,8 +113,8 @@ mgaFillInModes( unsigned pixel_bits, unsigned depth_bits, GLX_NONE, GLX_SWAP_UNDEFINED_OML, GLX_SWAP_COPY_OML }; - uint8_t depth_bits_array[3]; - uint8_t stencil_bits_array[3]; + u_int8_t depth_bits_array[3]; + u_int8_t stencil_bits_array[3]; depth_bits_array[0] = 0; diff --git a/src/mesa/drivers/dri/mga/mga_xmesa.h b/src/mesa/drivers/dri/mga/mga_xmesa.h index 6825c5ace6f..51cab51dada 100644 --- a/src/mesa/drivers/dri/mga/mga_xmesa.h +++ b/src/mesa/drivers/dri/mga/mga_xmesa.h @@ -144,7 +144,7 @@ do { \ #define MGA_BASE( reg ) ((unsigned long)(mmesa->mgaScreen->mmio.map)) #define MGA_ADDR( reg ) (MGA_BASE(reg) + reg) -#define MGA_DEREF( reg ) *(volatile uint32_t *)MGA_ADDR( reg ) +#define MGA_DEREF( reg ) *(volatile u_int32_t *)MGA_ADDR( reg ) #define MGA_READ( reg ) MGA_DEREF( reg ) #define MGA_WRITE( reg, val ) do { MGA_DEREF( reg ) = val; } while (0) diff --git a/src/mesa/drivers/dri/mga/mgaspan.c b/src/mesa/drivers/dri/mga/mgaspan.c index 62dccc6169f..81cf4c8812a 100644 --- a/src/mesa/drivers/dri/mga/mgaspan.c +++ b/src/mesa/drivers/dri/mga/mgaspan.c @@ -35,7 +35,6 @@ #define DBG 0 - #define LOCAL_VARS \ __DRIdrawablePrivate *dPriv = mmesa->mesa_drawable; \ mgaScreenPrivate *mgaScreen = mmesa->mgaScreen; \ diff --git a/src/mesa/drivers/dri/r128/r128_context.h b/src/mesa/drivers/dri/r128/r128_context.h index 0b4eaa2d741..4574f298bf8 100644 --- a/src/mesa/drivers/dri/r128/r128_context.h +++ b/src/mesa/drivers/dri/r128/r128_context.h @@ -140,9 +140,9 @@ struct r128_context { GLfloat hw_viewport[16]; GLfloat depth_scale; - uint32_t ClearColor; /* Color used to clear color buffer */ - uint32_t ClearDepth; /* Value used to clear depth buffer */ - uint32_t ClearStencil; /* Value used to clear stencil */ + u_int32_t ClearColor; /* Color used to clear color buffer */ + u_int32_t ClearDepth; /* Value used to clear depth buffer */ + u_int32_t ClearStencil; /* Value used to clear stencil */ /* Map GL texture units onto hardware */ diff --git a/src/mesa/drivers/dri/r128/r128_ioctl.c b/src/mesa/drivers/dri/r128/r128_ioctl.c index 1eb887f67ca..2ae0f6fa6b8 100644 --- a/src/mesa/drivers/dri/r128/r128_ioctl.c +++ b/src/mesa/drivers/dri/r128/r128_ioctl.c @@ -230,7 +230,7 @@ static int r128WaitForFrameCompletion( r128ContextPtr rmesa ) int wait = 0; while ( 1 ) { - uint32_t frame = read_MMIO_LE32( R128MMIO, R128_LAST_FRAME_REG ); + u_int32_t frame = read_MMIO_LE32( R128MMIO, R128_LAST_FRAME_REG ); if ( rmesa->sarea->last_frame - frame <= R128_MAX_OUTSTANDING ) { break; diff --git a/src/mesa/drivers/dri/r128/r128_ioctl.h b/src/mesa/drivers/dri/r128/r128_ioctl.h index c17d3ca8cb6..1ee17cf7c62 100644 --- a/src/mesa/drivers/dri/r128/r128_ioctl.h +++ b/src/mesa/drivers/dri/r128/r128_ioctl.h @@ -41,7 +41,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r128_reg.h" #include "r128_lock.h" -#define R128_BUFFER_MAX_DWORDS (R128_BUFFER_SIZE / sizeof(uint32_t)) +#define R128_BUFFER_MAX_DWORDS (R128_BUFFER_SIZE / sizeof(u_int32_t)) extern drmBufPtr r128GetBufferLocked( r128ContextPtr rmesa ); @@ -50,7 +50,7 @@ extern void r128FlushVerticesLocked( r128ContextPtr rmesa ); static __inline void *r128AllocDmaLow( r128ContextPtr rmesa, int count, int vert_size ) { - uint32_t *head; + u_int32_t *head; int bytes = count * vert_size; if ( !rmesa->vert_buf ) { @@ -64,7 +64,7 @@ static __inline void *r128AllocDmaLow( r128ContextPtr rmesa, int count, UNLOCK_HARDWARE( rmesa ); } - head = (uint32_t *)((char *)rmesa->vert_buf->address + rmesa->vert_buf->used); + head = (u_int32_t *)((char *)rmesa->vert_buf->address + rmesa->vert_buf->used); rmesa->vert_buf->used += bytes; rmesa->num_verts += count; diff --git a/src/mesa/drivers/dri/r128/r128_screen.c b/src/mesa/drivers/dri/r128/r128_screen.c index f4d069d1391..b9a92128bbb 100644 --- a/src/mesa/drivers/dri/r128/r128_screen.c +++ b/src/mesa/drivers/dri/r128/r128_screen.c @@ -381,8 +381,8 @@ r128FillInModes( unsigned pixel_bits, unsigned depth_bits, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - uint8_t depth_bits_array[2]; - uint8_t stencil_bits_array[2]; + u_int8_t depth_bits_array[2]; + u_int8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; diff --git a/src/mesa/drivers/dri/r128/r128_tex.c b/src/mesa/drivers/dri/r128/r128_tex.c index 29fa901c055..3b2d017c1f2 100644 --- a/src/mesa/drivers/dri/r128/r128_tex.c +++ b/src/mesa/drivers/dri/r128/r128_tex.c @@ -462,9 +462,9 @@ static void r128TexEnv( GLcontext *ctx, GLenum target, case GL_TEXTURE_LOD_BIAS: { - uint32_t t = rmesa->setup.tex_cntl_c; + u_int32_t t = rmesa->setup.tex_cntl_c; GLint bias; - uint32_t b; + u_int32_t b; /* GTH: This isn't exactly correct, but gives good results up to a * certain point. It is better than completely ignoring the LOD @@ -484,7 +484,7 @@ static void r128TexEnv( GLcontext *ctx, GLenum target, bias = 127; } - b = (uint32_t)bias & 0xff; + b = (u_int32_t)bias & 0xff; t &= ~R128_LOD_BIAS_MASK; t |= (b << R128_LOD_BIAS_SHIFT); diff --git a/src/mesa/drivers/dri/r128/r128_tex.h b/src/mesa/drivers/dri/r128/r128_tex.h index ddfdf683781..d6d2aeff954 100644 --- a/src/mesa/drivers/dri/r128/r128_tex.h +++ b/src/mesa/drivers/dri/r128/r128_tex.h @@ -70,7 +70,7 @@ extern void r128InitTextureFuncs( struct dd_function_table *functions ); #define R128PACKCOLOR4444( r, g, b, a ) \ ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4)) -static __inline__ uint32_t r128PackColor( GLuint cpp, +static __inline__ u_int32_t r128PackColor( GLuint cpp, GLubyte r, GLubyte g, GLubyte b, GLubyte a ) { diff --git a/src/mesa/drivers/dri/r128/r128_texmem.c b/src/mesa/drivers/dri/r128/r128_texmem.c index f7413cf5e35..d011a756719 100644 --- a/src/mesa/drivers/dri/r128/r128_texmem.c +++ b/src/mesa/drivers/dri/r128/r128_texmem.c @@ -85,7 +85,7 @@ static void uploadSubImage( r128ContextPtr rmesa, r128TexObjPtr t, int imageWidth, imageHeight; int remaining, rows; int format, dwords; - uint32_t pitch, offset; + u_int32_t pitch, offset; int i; /* Ensure we have a valid texture to upload */ @@ -201,7 +201,7 @@ static void uploadSubImage( r128ContextPtr rmesa, r128TexObjPtr t, remaining > 0 ; remaining -= rows, y += rows, i++ ) { - uint32_t *dst; + u_int32_t *dst; drmBufPtr buffer; assert(image->Data); @@ -212,7 +212,7 @@ static void uploadSubImage( r128ContextPtr rmesa, r128TexObjPtr t, LOCK_HARDWARE( rmesa ); buffer = r128GetBufferLocked( rmesa ); - dst = (uint32_t *)((char *)buffer->address + R128_HOSTDATA_BLIT_OFFSET); + dst = (u_int32_t *)((char *)buffer->address + R128_HOSTDATA_BLIT_OFFSET); /* Copy the next chunck of the texture image into the blit buffer */ { diff --git a/src/mesa/drivers/dri/r128/r128_texobj.h b/src/mesa/drivers/dri/r128/r128_texobj.h index 5ead8ca9f14..282e8871499 100644 --- a/src/mesa/drivers/dri/r128/r128_texobj.h +++ b/src/mesa/drivers/dri/r128/r128_texobj.h @@ -53,14 +53,14 @@ typedef struct r128_tex_obj r128TexObj, *r128TexObjPtr; struct r128_tex_obj { driTextureObject base; - uint32_t bufAddr; /* Offset to start of locally + u_int32_t bufAddr; /* Offset to start of locally shared texture block */ GLuint age; r128TexImage image[R128_MAX_TEXTURE_LEVELS]; /* Image data for all mipmap levels */ - uint32_t textureFormat; /* Actual hardware format */ + u_int32_t textureFormat; /* Actual hardware format */ drm_r128_texture_regs_t setup; /* Setup regs for texture */ }; diff --git a/src/mesa/drivers/dri/r128/server/r128.h b/src/mesa/drivers/dri/r128/server/r128.h index 15e25285b6a..ce98b1b915c 100644 --- a/src/mesa/drivers/dri/r128/server/r128.h +++ b/src/mesa/drivers/dri/r128/server/r128.h @@ -87,74 +87,74 @@ typedef struct { /* All values in XCLKS */ typedef struct { /* Common registers */ - uint32_t ovr_clr; - uint32_t ovr_wid_left_right; - uint32_t ovr_wid_top_bottom; - uint32_t ov0_scale_cntl; - uint32_t mpp_tb_config; - uint32_t mpp_gp_config; - uint32_t subpic_cntl; - uint32_t viph_control; - uint32_t i2c_cntl_1; - uint32_t gen_int_cntl; - uint32_t cap0_trig_cntl; - uint32_t cap1_trig_cntl; - uint32_t bus_cntl; - uint32_t config_cntl; + u_int32_t ovr_clr; + u_int32_t ovr_wid_left_right; + u_int32_t ovr_wid_top_bottom; + u_int32_t ov0_scale_cntl; + u_int32_t mpp_tb_config; + u_int32_t mpp_gp_config; + u_int32_t subpic_cntl; + u_int32_t viph_control; + u_int32_t i2c_cntl_1; + u_int32_t gen_int_cntl; + u_int32_t cap0_trig_cntl; + u_int32_t cap1_trig_cntl; + u_int32_t bus_cntl; + u_int32_t config_cntl; /* Other registers to save for VT switches */ - uint32_t dp_datatype; - uint32_t gen_reset_cntl; - uint32_t clock_cntl_index; - uint32_t amcgpio_en_reg; - uint32_t amcgpio_mask; + u_int32_t dp_datatype; + u_int32_t gen_reset_cntl; + u_int32_t clock_cntl_index; + u_int32_t amcgpio_en_reg; + u_int32_t amcgpio_mask; /* CRTC registers */ - uint32_t crtc_gen_cntl; - uint32_t crtc_ext_cntl; - uint32_t dac_cntl; - uint32_t crtc_h_total_disp; - uint32_t crtc_h_sync_strt_wid; - uint32_t crtc_v_total_disp; - uint32_t crtc_v_sync_strt_wid; - uint32_t crtc_offset; - uint32_t crtc_offset_cntl; - uint32_t crtc_pitch; + u_int32_t crtc_gen_cntl; + u_int32_t crtc_ext_cntl; + u_int32_t dac_cntl; + u_int32_t crtc_h_total_disp; + u_int32_t crtc_h_sync_strt_wid; + u_int32_t crtc_v_total_disp; + u_int32_t crtc_v_sync_strt_wid; + u_int32_t crtc_offset; + u_int32_t crtc_offset_cntl; + u_int32_t crtc_pitch; /* CRTC2 registers */ - uint32_t crtc2_gen_cntl; + u_int32_t crtc2_gen_cntl; /* Flat panel registers */ - uint32_t fp_crtc_h_total_disp; - uint32_t fp_crtc_v_total_disp; - uint32_t fp_gen_cntl; - uint32_t fp_h_sync_strt_wid; - uint32_t fp_horz_stretch; - uint32_t fp_panel_cntl; - uint32_t fp_v_sync_strt_wid; - uint32_t fp_vert_stretch; - uint32_t lvds_gen_cntl; - uint32_t tmds_crc; - uint32_t tmds_transmitter_cntl; + u_int32_t fp_crtc_h_total_disp; + u_int32_t fp_crtc_v_total_disp; + u_int32_t fp_gen_cntl; + u_int32_t fp_h_sync_strt_wid; + u_int32_t fp_horz_stretch; + u_int32_t fp_panel_cntl; + u_int32_t fp_v_sync_strt_wid; + u_int32_t fp_vert_stretch; + u_int32_t lvds_gen_cntl; + u_int32_t tmds_crc; + u_int32_t tmds_transmitter_cntl; /* Computed values for PLL */ - uint32_t dot_clock_freq; - uint32_t pll_output_freq; + u_int32_t dot_clock_freq; + u_int32_t pll_output_freq; int feedback_div; int post_div; /* PLL registers */ - uint32_t ppll_ref_div; - uint32_t ppll_div_3; - uint32_t htotal_cntl; + u_int32_t ppll_ref_div; + u_int32_t ppll_div_3; + u_int32_t htotal_cntl; /* DDA register */ - uint32_t dda_config; - uint32_t dda_on_off; + u_int32_t dda_config; + u_int32_t dda_on_off; /* Pallet */ GLboolean palette_valid; - uint32_t palette[256]; + u_int32_t palette[256]; } R128SaveRec, *R128SavePtr; typedef struct { @@ -169,8 +169,8 @@ typedef struct { unsigned char *MMIO; /* Map of MMIO region */ unsigned char *FB; /* Map of frame buffer */ - uint32_t MemCntl; - uint32_t BusCntl; + u_int32_t MemCntl; + u_int32_t BusCntl; unsigned long FbMapSize; /* Size of frame buffer, in bytes */ int Flags; /* Saved copy of mode flags */ @@ -201,7 +201,7 @@ typedef struct { /* Computed values for Rage 128 */ int pitch; int datatype; - uint32_t dp_gui_master_cntl; + u_int32_t dp_gui_master_cntl; /* Saved values for ScreenToScreenCopy */ int xdir; @@ -306,18 +306,18 @@ typedef struct { int log2TexGran; /* Saved scissor values */ - uint32_t sc_left; - uint32_t sc_right; - uint32_t sc_top; - uint32_t sc_bottom; + u_int32_t sc_left; + u_int32_t sc_right; + u_int32_t sc_top; + u_int32_t sc_bottom; - uint32_t re_top_left; - uint32_t re_width_height; + u_int32_t re_top_left; + u_int32_t re_width_height; - uint32_t aux_sc_cntl; + u_int32_t aux_sc_cntl; int irq; - uint32_t gen_int_cntl; + u_int32_t gen_int_cntl; GLboolean DMAForXv; @@ -388,7 +388,7 @@ do { \ #define R128_VERBOSE 0 -#define RING_LOCALS uint32_t *__head; int __count; +#define RING_LOCALS u_int32_t *__head; int __count; #define R128CCE_REFRESH(pScrn, info) \ do { \ @@ -429,12 +429,12 @@ do { \ fprintf(stderr, \ "ADVANCE_RING() used: %d+%d=%d/%d\n", \ info->indirectBuffer->used - info->indirectStart, \ - __count * sizeof(uint32_t), \ + __count * sizeof(u_int32_t), \ info->indirectBuffer->used - info->indirectStart + \ - __count * sizeof(uint32_t), \ + __count * sizeof(u_int32_t), \ info->indirectBuffer->total - info->indirectStart ); \ } \ - info->indirectBuffer->used += __count * (int)sizeof(uint32_t); \ + info->indirectBuffer->used += __count * (int)sizeof(u_int32_t); \ } while (0) #define OUT_RING( x ) do { \ diff --git a/src/mesa/drivers/dri/r128/server/r128_dri.c b/src/mesa/drivers/dri/r128/server/r128_dri.c index 61587617a63..a2b717b0ea3 100644 --- a/src/mesa/drivers/dri/r128/server/r128_dri.c +++ b/src/mesa/drivers/dri/r128/server/r128_dri.c @@ -271,7 +271,7 @@ static GLboolean R128DRIPciInit(const DRIDriverContext *ctx) { R128InfoPtr info = ctx->driverPrivate; unsigned char *R128MMIO = ctx->MMIOAddress; - uint32_t chunk; + u_int32_t chunk; int ret; int flags; diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c index 04a00b71518..aafa2981bd4 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.c +++ b/src/mesa/drivers/dri/r200/r200_ioctl.c @@ -343,11 +343,11 @@ void r200AllocDmaRegionVerts( r200ContextPtr rmesa, * SwapBuffers with client-side throttling */ -static uint32_t r200GetLastFrame(r200ContextPtr rmesa) +static u_int32_t r200GetLastFrame(r200ContextPtr rmesa) { drm_radeon_getparam_t gp; int ret; - uint32_t frame; + u_int32_t frame; gp.param = RADEON_PARAM_LAST_FRAME; gp.value = (int *)&frame; diff --git a/src/mesa/drivers/dri/r200/r200_screen.c b/src/mesa/drivers/dri/r200/r200_screen.c index 4d46accda6c..6731287d7b7 100644 --- a/src/mesa/drivers/dri/r200/r200_screen.c +++ b/src/mesa/drivers/dri/r200/r200_screen.c @@ -160,8 +160,8 @@ r200FillInModes( unsigned pixel_bits, unsigned depth_bits, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - uint8_t depth_bits_array[2]; - uint8_t stencil_bits_array[2]; + u_int8_t depth_bits_array[2]; + u_int8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; @@ -372,7 +372,7 @@ r200CreateScreen( __DRIscreenPrivate *sPriv ) __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ ); return NULL; } - screen->scratch = (__volatile__ uint32_t *) + screen->scratch = (__volatile__ u_int32_t *) ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET); screen->buffers = drmMapBufs( sPriv->fd ); diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 13a951f0659..f5a4a031188 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -273,7 +273,7 @@ static void r200_set_blend_state( GLcontext * ctx ) default: fprintf( stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n", - __func__, __LINE__, ctx->Color.BlendEquationRGB ); + __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB ); return; } @@ -312,7 +312,7 @@ static void r200_set_blend_state( GLcontext * ctx ) default: fprintf( stderr, "[%s:%u] Invalid A blend equation (0x%04x).\n", - __func__, __LINE__, ctx->Color.BlendEquationA ); + __FUNCTION__, __LINE__, ctx->Color.BlendEquationA ); return; } @@ -829,7 +829,7 @@ static void r200PolygonMode( GLcontext *ctx, GLenum face, GLenum mode ) static void r200UpdateSpecular( GLcontext *ctx ) { r200ContextPtr rmesa = R200_CONTEXT(ctx); - uint32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL]; + u_int32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL]; R200_STATECHANGE( rmesa, tcl ); R200_STATECHANGE( rmesa, vtx ); diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c index e4f6caa472d..04c40d47c2e 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.c +++ b/src/mesa/drivers/dri/r200/r200_tcl.c @@ -101,7 +101,7 @@ static GLboolean discrete_prim[0x10] = { }; -#define LOCAL_VARS r200ContextPtr rmesa = R200_CONTEXT(ctx); (void)rmesa +#define LOCAL_VARS r200ContextPtr rmesa = R200_CONTEXT(ctx) #define ELT_TYPE GLushort #define ELT_INIT(prim, hw_prim) \ @@ -220,7 +220,7 @@ static void r200EmitPrim( GLcontext *ctx, #ifdef MESA_BIG_ENDIAN /* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */ -#define EMIT_ELT(dest, offset, x) do { \ +#define EMIT_ELT(dest, offset, x) do { \ int off = offset + ( ( (GLuint)dest & 0x2 ) >> 1 ); \ GLushort *des = (GLushort *)( (GLuint)dest & ~0x2 ); \ (des)[ off + 1 - 2 * ( off & 1 ) ] = (GLushort)(x); \ diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c index 5b758e66ba2..ee1104d91a5 100644 --- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c +++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c @@ -772,11 +772,11 @@ void radeonAllocDmaRegionVerts( radeonContextPtr rmesa, * SwapBuffers with client-side throttling */ -static uint32_t radeonGetLastFrame (radeonContextPtr rmesa) +static u_int32_t radeonGetLastFrame (radeonContextPtr rmesa) { unsigned char *RADEONMMIO = rmesa->radeonScreen->mmio.map; int ret; - uint32_t frame; + u_int32_t frame; if (rmesa->dri.screen->drmMinor >= 4) { drm_radeon_getparam_t gp; @@ -1011,7 +1011,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all, __DRIdrawablePrivate *dPriv = rmesa->dri.drawable; drm_radeon_sarea_t *sarea = rmesa->sarea; unsigned char *RADEONMMIO = rmesa->radeonScreen->mmio.map; - uint32_t clear; + u_int32_t clear; GLuint flags = 0; GLuint color_mask = 0; GLint ret, i; diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index d23313da448..35f965fd1e1 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -134,8 +134,8 @@ radeonFillInModes( unsigned pixel_bits, unsigned depth_bits, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - uint8_t depth_bits_array[2]; - uint8_t stencil_bits_array[2]; + u_int8_t depth_bits_array[2]; + u_int8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; @@ -273,7 +273,7 @@ radeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv ) __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ ); return NULL; } - screen->scratch = (__volatile__ uint32_t *) + screen->scratch = (__volatile__ u_int32_t *) ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET); screen->buffers = drmMapBufs( sPriv->fd ); diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h index edd4a08f818..72edec881d4 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.h +++ b/src/mesa/drivers/dri/radeon/radeon_screen.h @@ -89,7 +89,7 @@ typedef struct { drmBufMapPtr buffers; - __volatile__ uint32_t *scratch; + __volatile__ u_int32_t *scratch; __DRIscreenPrivate *driScreen; unsigned int sarea_priv_offset; diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 3d0eda3a07e..ff6f8bc7269 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -693,7 +693,7 @@ static void radeonPolygonMode( GLcontext *ctx, GLenum face, GLenum mode ) static void radeonUpdateSpecular( GLcontext *ctx ) { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - uint32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL]; + u_int32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL]; RADEON_STATECHANGE( rmesa, tcl ); diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c index 35720fd6589..7adec5e488c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c @@ -508,8 +508,8 @@ static __inline void radeonEltPrimitive( radeonContextPtr rmesa, GLenum prim ) -#define LOCAL_VARS radeonContextPtr rmesa = RADEON_CONTEXT(ctx); (void)rmesa -#define ELTS_VARS( buf ) GLushort *dest = buf +#define LOCAL_VARS radeonContextPtr rmesa = RADEON_CONTEXT(ctx) +#define ELTS_VARS( buf ) GLushort *dest = buf; (void)rmesa; #define INIT( prim ) radeonDmaPrimitive( rmesa, prim ) #define ELT_INIT(prim) radeonEltPrimitive( rmesa, prim ) #define FLUSH() RADEON_NEWPRIM( rmesa ) diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.c b/src/mesa/drivers/dri/radeon/radeon_tcl.c index 760c9a03410..5c91bf4bd8a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_tcl.c @@ -105,7 +105,7 @@ static GLboolean discrete_prim[0x10] = { }; -#define LOCAL_VARS radeonContextPtr rmesa = RADEON_CONTEXT(ctx); (void)rmesa +#define LOCAL_VARS radeonContextPtr rmesa = RADEON_CONTEXT(ctx) #define ELT_TYPE GLushort #define ELT_INIT(prim, hw_prim) \ diff --git a/src/mesa/drivers/dri/sis/sis_screen.c b/src/mesa/drivers/dri/sis/sis_screen.c index 1cf2211d302..91e7ec29601 100644 --- a/src/mesa/drivers/dri/sis/sis_screen.c +++ b/src/mesa/drivers/dri/sis/sis_screen.c @@ -74,8 +74,8 @@ sisFillInModes(int bpp) static const GLenum back_buffer_modes[] = { GLX_NONE, GLX_SWAP_UNDEFINED_OML }; - uint8_t depth_bits_array[4]; - uint8_t stencil_bits_array[4]; + u_int8_t depth_bits_array[4]; + u_int8_t stencil_bits_array[4]; depth_bits_array[0] = 0; stencil_bits_array[0] = 0; diff --git a/src/mesa/drivers/dri/tdfx/tdfx_state.c b/src/mesa/drivers/dri/tdfx/tdfx_state.c index 6edf804b2ec..7aa6098c721 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_state.c +++ b/src/mesa/drivers/dri/tdfx/tdfx_state.c @@ -71,7 +71,7 @@ static void tdfxUpdateAlphaMode( GLcontext *ctx ) { tdfxContextPtr fxMesa = TDFX_CONTEXT(ctx); GrCmpFnc_t func; - GrAlphaBlendFnc_t srcRGB, dstRGB, srcA, dstA; + GrAlphaBlendFnc_t srcRGB, dstRGB = GR_BLEND_ZERO, srcA, dstA; GrAlphaBlendOp_t eqRGB, eqA; GrAlpha_t ref = (GLint) (ctx->Color.AlphaRef * 255.0); diff --git a/src/mesa/drivers/dri/tdfx/tdfx_tex.c b/src/mesa/drivers/dri/tdfx/tdfx_tex.c index 2e8e3cba5dd..3091fd18635 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_tex.c +++ b/src/mesa/drivers/dri/tdfx/tdfx_tex.c @@ -69,7 +69,7 @@ _mesa_halve2x2_teximage2d ( GLcontext *ctx, GLuint bpt = 0; GLubyte *_s = NULL; GLubyte *_d = NULL; - GLenum _t; + GLenum _t = 0; if (texImage->TexFormat->MesaFormat == MESA_FORMAT_RGB565) { _t = GL_UNSIGNED_SHORT_5_6_5_REV; @@ -650,6 +650,8 @@ convertPalette(FxU32 data[256], const struct gl_color_table *table) data[i] = (a << 24) | (r << 16) | (g << 8) | b; } return GR_TEXTABLE_PALETTE_6666_EXT; + default: + return GR_TEXTABLE_NCC0; /* ???? */ } /* XXX fixme: how can this happen? */ _mesa_error(NULL, GL_INVALID_ENUM, "convertPalette: table->Format == %s", diff --git a/src/mesa/drivers/dri/tdfx/tdfx_texstate.c b/src/mesa/drivers/dri/tdfx/tdfx_texstate.c index bb974279a2a..7059b56e3d0 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_texstate.c +++ b/src/mesa/drivers/dri/tdfx/tdfx_texstate.c @@ -1922,8 +1922,10 @@ static void setupTextureDoubleTMU(GLcontext * ctx) tdfxTexInfo *ti1 = TDFX_TEXTURE_DATA(tObj1); struct gl_texture_image *baseImage0 = tObj0->Image[0][tObj0->BaseLevel]; struct gl_texture_image *baseImage1 = tObj1->Image[0][tObj1->BaseLevel]; +#if 0/*JJJ*/ const GLenum envMode0 = ctx->Texture.Unit[0].EnvMode; const GLenum envMode1 = ctx->Texture.Unit[1].EnvMode; +#endif if (baseImage0->Border > 0 || baseImage1->Border > 0) { FALLBACK(fxMesa, TDFX_FALLBACK_TEXTURE_BORDER, GL_TRUE); diff --git a/src/mesa/drivers/dri/unichrome/server/via_dri.c b/src/mesa/drivers/dri/unichrome/server/via_dri.c index 92c97003709..ea53c6adf86 100644 --- a/src/mesa/drivers/dri/unichrome/server/via_dri.c +++ b/src/mesa/drivers/dri/unichrome/server/via_dri.c @@ -68,9 +68,9 @@ static int VIADRIFinishScreenInit(DRIDriverContext * ctx); /* _SOLO : missing macros normally defined by X code */ #define xf86DrvMsg(a, b, ...) fprintf(stderr, __VA_ARGS__) -#define MMIO_IN8(base, addr) ((*(((volatile uint8_t*)base)+(addr)))+0) -#define MMIO_OUT8(base, addr, val) ((*(((volatile uint8_t*)base)+(addr)))=((uint8_t)val)) -#define MMIO_OUT16(base, addr, val) ((*(volatile uint16_t*)(((uint8_t*)base)+(addr)))=((uint16_t)val)) +#define MMIO_IN8(base, addr) ((*(((volatile u_int8_t*)base)+(addr)))+0) +#define MMIO_OUT8(base, addr, val) ((*(((volatile u_int8_t*)base)+(addr)))=((u_int8_t)val)) +#define MMIO_OUT16(base, addr, val) ((*(volatile u_int16_t*)(((u_int8_t*)base)+(addr)))=((u_int16_t)val)) #define VIDEO 0 #define AGP 1 @@ -383,9 +383,9 @@ static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia) drmInfo.fb_offset = pVia->FrameBufferBase; drmInfo.mmio_offset = pVia->registerHandle; if (pVia->IsPCI) - drmInfo.agpAddr = (uint32_t)NULL; + drmInfo.agpAddr = (u_int32_t)NULL; else - drmInfo.agpAddr = (uint32_t)pVia->agpAddr; + drmInfo.agpAddr = (u_int32_t)pVia->agpAddr; if (drmVIAInitMAP(pVia->drmFD, &drmInfo) < 0) return GL_FALSE; @@ -489,7 +489,7 @@ static void VIADisableMMIO(DRIDriverContext * ctx) static void VIADisableExtendedFIFO(DRIDriverContext *ctx) { VIAPtr pVia = VIAPTR(ctx); - uint32_t dwGE230, dwGE298; + u_int32_t dwGE230, dwGE298; /* Cause of exit XWindow will dump back register value, others chipset no * need to set extended fifo value */ @@ -511,8 +511,8 @@ static void VIADisableExtendedFIFO(DRIDriverContext *ctx) static void VIAEnableExtendedFIFO(DRIDriverContext *ctx) { VIAPtr pVia = VIAPTR(ctx); - uint8_t bRegTemp; - uint32_t dwGE230, dwGE298; + u_int8_t bRegTemp; + u_int32_t dwGE230, dwGE298; switch (pVia->Chipset) { case VIA_CLE266: @@ -707,7 +707,7 @@ static void VIAEnableExtendedFIFO(DRIDriverContext *ctx) SR1C[7:0], SR1D[1:0] (10bits) *=*/ wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4; VGAOUT8(0x3c4, 0x1c); - VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF)); + VGAOUT8(0x3c5, (u_int8_t)(wRegTemp & 0xFF)); VGAOUT8(0x3c4, 0x1d); bRegTemp = VGAIN8(0x3c5) & ~0x03; VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8)); @@ -753,7 +753,7 @@ static void VIAEnableExtendedFIFO(DRIDriverContext *ctx) SR1C[7:0], SR1D[1:0] (10bits) *=*/ wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4; VGAOUT8(0x3c4, 0x1c); - VGAOUT8(0x3c5, (uint8_t)(wRegTemp & 0xFF)); + VGAOUT8(0x3c5, (u_int8_t)(wRegTemp & 0xFF)); VGAOUT8(0x3c4, 0x1d); bRegTemp = VGAIN8(0x3c5) & ~0x03; VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8)); @@ -781,9 +781,9 @@ static void VIAEnableExtendedFIFO(DRIDriverContext *ctx) static void VIAInitialize2DEngine(DRIDriverContext *ctx) { VIAPtr pVia = VIAPTR(ctx); - uint32_t dwVQStartAddr, dwVQEndAddr; - uint32_t dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH; - uint32_t dwGEMode; + u_int32_t dwVQStartAddr, dwVQEndAddr; + u_int32_t dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH; + u_int32_t dwGEMode; /* init 2D engine regs to reset 2D engine */ VIASETREG(0x04, 0x0); @@ -925,14 +925,14 @@ static void VIAInitialize3DEngine(DRIDriverContext *ctx) for (i = 0; i <= 0x7D; i++) { - VIASETREG(0x440, (uint32_t) i << 24); + VIASETREG(0x440, (u_int32_t) i << 24); } VIASETREG(0x43C, 0x00020000); for (i = 0; i <= 0x94; i++) { - VIASETREG(0x440, (uint32_t) i << 24); + VIASETREG(0x440, (u_int32_t) i << 24); } VIASETREG(0x440, 0x82400000); @@ -942,7 +942,7 @@ static void VIAInitialize3DEngine(DRIDriverContext *ctx) for (i = 0; i <= 0x94; i++) { - VIASETREG(0x440, (uint32_t) i << 24); + VIASETREG(0x440, (u_int32_t) i << 24); } VIASETREG(0x440, 0x82400000); @@ -950,7 +950,7 @@ static void VIAInitialize3DEngine(DRIDriverContext *ctx) for (i = 0; i <= 0x03; i++) { - VIASETREG(0x440, (uint32_t) i << 24); + VIASETREG(0x440, (u_int32_t) i << 24); } VIASETREG(0x43C, 0x00030000); diff --git a/src/mesa/drivers/dri/unichrome/server/via_driver.h b/src/mesa/drivers/dri/unichrome/server/via_driver.h index f6f2d58938b..997b2e41a70 100644 --- a/src/mesa/drivers/dri/unichrome/server/via_driver.h +++ b/src/mesa/drivers/dri/unichrome/server/via_driver.h @@ -212,12 +212,12 @@ typedef struct _VIA { XAAInfoRecPtr AccelInfoRec; xRectangle Rect; #endif - uint32_t SavedCmd; - uint32_t SavedFgColor; - uint32_t SavedBgColor; - uint32_t SavedPattern0; - uint32_t SavedPattern1; - uint32_t SavedPatternAddr; + u_int32_t SavedCmd; + u_int32_t SavedFgColor; + u_int32_t SavedBgColor; + u_int32_t SavedPattern0; + u_int32_t SavedPattern1; + u_int32_t SavedPatternAddr; #if 0 /* Support for Int10 processing */ @@ -255,8 +255,8 @@ typedef struct _VIA { #endif /* - uint32_t Cap0_Deinterlace; - uint32_t Cap1_Deinterlace; + u_int32_t Cap0_Deinterlace; + u_int32_t Cap1_Deinterlace; int Cap0_FieldSwap; int NoCap0_HFilter; @@ -272,7 +272,7 @@ typedef struct _VIA { VIAConfigPrivPtr pVisualConfigsPriv; unsigned long agpHandle; unsigned long registerHandle; - uint32_t agpAddr; + u_int32_t agpAddr; unsigned char *agpBase; unsigned int agpSize; int IsPCI; @@ -288,11 +288,11 @@ typedef struct _VIA { #endif int V4LEnabled; - uint16_t ActiveDevice; /* if SAMM, non-equal pBIOSInfo->ActiveDevice */ + u_int16_t ActiveDevice; /* if SAMM, non-equal pBIOSInfo->ActiveDevice */ unsigned char *CursorImage; - uint32_t CursorFG; - uint32_t CursorBG; - uint32_t CursorMC; + u_int32_t CursorFG; + u_int32_t CursorBG; + u_int32_t CursorMC; unsigned char MemClk; int EnableExtendedFIFO; diff --git a/src/mesa/drivers/dri/unichrome/via_screen.c b/src/mesa/drivers/dri/unichrome/via_screen.c index fb00950bbbd..283dec14036 100644 --- a/src/mesa/drivers/dri/unichrome/via_screen.c +++ b/src/mesa/drivers/dri/unichrome/via_screen.c @@ -324,8 +324,8 @@ viaFillInModes( unsigned pixel_bits, GLboolean have_back_buffer ) /* The 32-bit depth-buffer mode isn't supported yet, so don't actually * enable it. */ - static const uint8_t depth_bits_array[4] = { 0, 16, 24, 32 }; - static const uint8_t stencil_bits_array[4] = { 0, 0, 8, 0 }; + static const u_int8_t depth_bits_array[4] = { 0, 16, 24, 32 }; + static const u_int8_t stencil_bits_array[4] = { 0, 0, 8, 0 }; const unsigned depth_buffer_factor = 3; diff --git a/src/mesa/drivers/dri/unichrome/via_state.c b/src/mesa/drivers/dri/unichrome/via_state.c index 4f75f08617f..052ceabc3b5 100644 --- a/src/mesa/drivers/dri/unichrome/via_state.c +++ b/src/mesa/drivers/dri/unichrome/via_state.c @@ -513,10 +513,10 @@ void viaInitState(GLcontext *ctx) /** * Convert S and T texture coordinate wrap modes to hardware bits. */ -static uint32_t +static u_int32_t get_wrap_mode( GLenum sWrap, GLenum tWrap ) { - uint32_t v = 0; + u_int32_t v = 0; switch( sWrap ) { diff --git a/src/mesa/main/colortab.c b/src/mesa/main/colortab.c index e6752d01229..4eafe3e899f 100644 --- a/src/mesa/main/colortab.c +++ b/src/mesa/main/colortab.c @@ -543,7 +543,6 @@ _mesa_ColorSubTable( GLenum target, GLsizei start, struct gl_color_table *table = NULL; GLfloat rScale = 1.0, gScale = 1.0, bScale = 1.0, aScale = 1.0; GLfloat rBias = 0.0, gBias = 0.0, bBias = 0.0, aBias = 0.0; - GLint comps; ASSERT_OUTSIDE_BEGIN_END_AND_FLUSH(ctx); switch (target) { @@ -636,8 +635,8 @@ _mesa_ColorSubTable( GLenum target, GLsizei start, return; } - comps = _mesa_components_in_format(table->Format); - assert(comps > 0); /* error should have been caught sooner */ + /* error should have been caught sooner */ + assert(_mesa_components_in_format(table->Format) > 0); if (start + count > (GLint) table->Size) { _mesa_error(ctx, GL_INVALID_VALUE, "glColorSubTable(count)"); diff --git a/src/mesa/main/enable.c b/src/mesa/main/enable.c index f1ed98d4bb1..8968c0aa838 100644 --- a/src/mesa/main/enable.c +++ b/src/mesa/main/enable.c @@ -645,7 +645,6 @@ void _mesa_set_enable( GLcontext *ctx, GLenum cap, GLboolean state ) texUnit->TexGenEnabled = newenabled; break; } - break; case GL_TEXTURE_GEN_S: { GLuint unit = ctx->Texture.CurrentUnit; struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; @@ -658,7 +657,6 @@ void _mesa_set_enable( GLcontext *ctx, GLenum cap, GLboolean state ) texUnit->TexGenEnabled = newenabled; break; } - break; case GL_TEXTURE_GEN_T: { GLuint unit = ctx->Texture.CurrentUnit; struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; @@ -671,7 +669,6 @@ void _mesa_set_enable( GLcontext *ctx, GLenum cap, GLboolean state ) texUnit->TexGenEnabled = newenabled; break; } - break; /* * CLIENT STATE!!! diff --git a/src/mesa/main/enums.h b/src/mesa/main/enums.h index d2fa917d42f..7e8d4ee94fc 100644 --- a/src/mesa/main/enums.h +++ b/src/mesa/main/enums.h @@ -31,13 +31,13 @@ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ - +/* $XFree86: xc/extras/Mesa/src/mesa/main/enums.h,v 1.2 2004/06/23 19:40:14 tsi Exp $ */ #ifndef _ENUMS_H_ #define _ENUMS_H_ -#ifdef _HAVE_FULL_GL +#if defined(_HAVE_FULL_GL) && _HAVE_FULL_GL extern const char *_mesa_lookup_enum_by_nr( int nr ); extern int _mesa_lookup_enum_by_name( const char *symbol ); diff --git a/src/mesa/shader/arbprogparse.c b/src/mesa/shader/arbprogparse.c index a1be2b535ed..678d40bb685 100644 --- a/src/mesa/shader/arbprogparse.c +++ b/src/mesa/shader/arbprogparse.c @@ -42,9 +42,12 @@ #include "arbprogparse.h" #include "grammar_mesa.h" -#if !defined(__GNUC__) && !defined(__extension__) +#ifndef __extension__ +#if !defined(__GNUC__) || (__GNUC__ < 2) || \ + ((__GNUC__ == 2) && (__GNUC_MINOR__ <= 7)) # define __extension__ #endif +#endif /* TODO: * Fragment Program Stuff: diff --git a/src/mesa/x86/common_x86.c b/src/mesa/x86/common_x86.c index 2d830b4b0fd..b3e1401b8a2 100644 --- a/src/mesa/x86/common_x86.c +++ b/src/mesa/x86/common_x86.c @@ -230,7 +230,8 @@ static void check_os_sse_support( void ) #endif /* _POSIX_SOURCE && X86_FXSR_MAGIC */ #elif defined(__FreeBSD__) { - int ret, len, enabled; + int ret, enabled; + unsigned int len; len = sizeof(enabled); ret = sysctlbyname("hw.instruction_sse", &enabled, &len, NULL, 0); if (ret || !enabled)