From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 1 Apr 2021 22:07:53 +0000 (+0100)
Subject: reduce subset of functions to be created in JTAG boundary scan
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=38d6b127762a53e069083893027e2750c06dda05;p=soc.git

reduce subset of functions to be created in JTAG boundary scan
---

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index d1a5b2c7..a615b03d 100644
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -169,8 +169,14 @@ class TestIssuerInternal(Elaboratable):
         # for parts of the rest of the core
         self.jtag_en = hasattr(pspec, "debug") and pspec.debug == 'jtag'
         if self.jtag_en:
-            subset = {'uart', 'mtwi', 'eint', 'gpio', 'mspi0', 'mspi1',
-                      'pwm', 'sd0', 'sdr'}
+            # XXX MUST keep this up-to-date with litex, and
+            # soc-cocotb-sim, and err.. all needs sorting out, argh
+            subset = ['uart',
+                      # 'mtwi',  - disabled for now
+                      'eint', 'gpio', 'mspi0',
+                      # 'mspi1', - disabled for now
+                      # 'pwm', 'sd0', - disabled for now
+                       'sdr']
             self.jtag = JTAG(get_pinspecs(subset=subset))
             # add signals to pspec to enable/disable icache and dcache
             # (or data and intstruction wishbone if icache/dcache not included)