From: Eddie Hung Date: Thu, 21 May 2020 16:10:56 +0000 (-0700) Subject: Update frontends/verilog/verilog_parser.y X-Git-Tag: working-ls180~544^2 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=38e858af8d5f61677d9686c022c864857f729d58;p=yosys.git Update frontends/verilog/verilog_parser.y Co-authored-by: Alberto Gonzalez <61295559+boqwxp@users.noreply.github.com> --- diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index fd4ff68a9..ae7a3f4aa 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -2216,7 +2216,7 @@ simple_behavioral_stmt: behavioral_stmt: defattr | assert | wire_decl | param_decl | localparam_decl | typedef_decl | non_opt_delay behavioral_stmt | - simple_behavioral_stmt ';' | ';' | + attr simple_behavioral_stmt ';' | ';' | attr hierarchical_id { AstNode *node = new AstNode(AST_TCALL); node->str = *$2;