From: lkcl <lkcl@web>
Date: Tue, 5 Jan 2021 01:42:55 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~617
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=38e90a9658f0743062017ab7b31e6c7cb02183d7;p=libreriscv.git

---

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index 85f7e9038..183830934 100644
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -519,6 +519,7 @@ as long as the results produced conform to the elwidth pseudocode.
 
 * <https://developer.arm.com/documentation/ddi0406/c/Application-Level-Architecture/Application-Level-Memory-Model/Endian-support/Endianness-in-Advanced-SIMD?lang=en>
 * <https://stackoverflow.com/questions/24045102/how-does-endianness-work-with-simd-registers>
+* <https://llvm.org/docs/BigEndianNEON.html>
 
 
 ## Source and Destination overrides