From: Segher Boessenkool Date: Tue, 28 May 2019 11:45:48 +0000 (+0200) Subject: rs6000: Improve p9-dimode* testcases X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=392d2ff3bd6fc66a6683540fc33910ddef9bf6f1;p=gcc.git rs6000: Improve p9-dimode* testcases This removes the unnecessary restriction to 32-bit (all three ways). It also scans for mtvsr*, not just mtvsrd. Finally, it uses the "wa" constraints instead of "wi" in the inline asm statements. gcc/testsuite/ * gcc.target/powerpc/p9-dimode1.c: Don't restrict to -m64. Check for all mtvsr*, not just mtvsrd. Use "wa" instead of "wi" constraints. * gcc.target/powerpc/p9-dimode2.c: Ditto. From-SVN: r271696 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index fe90a4fda8b..f1acd6dbc7a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2019-05-28 Segher Boessenkool + + * gcc.target/powerpc/p9-dimode1.c: Don't restrict to -m64. Check for + all mtvsr*, not just mtvsrd. Use "wa" instead of "wi" constraints. + * gcc.target/powerpc/p9-dimode2.c: Ditto. + 2019-05-28 Martin Liska PR ipa/90555 diff --git a/gcc/testsuite/gcc.target/powerpc/p9-dimode1.c b/gcc/testsuite/gcc.target/powerpc/p9-dimode1.c index 424ddb5f0de..b2cd3d68221 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-dimode1.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-dimode1.c @@ -1,21 +1,17 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ /* Verify P9 changes to allow DImode into Altivec registers, and generate constants using XXSPLTIB. */ -#ifndef _ARCH_PPC64 -#error "This code is 64-bit." -#endif - double p9_zero (void) { long l = 0; double ret; - __asm__ ("xxlor %x0,%x1,%x1" : "=&d" (ret) : "wi" (l)); + __asm__ ("xxlor %x0,%x1,%x1" : "=&d" (ret) : "wa" (l)); return ret; } @@ -26,7 +22,7 @@ p9_plus_1 (void) long l = 1; double ret; - __asm__ ("xxlor %x0,%x1,%x1" : "=&d" (ret) : "wi" (l)); + __asm__ ("xxlor %x0,%x1,%x1" : "=&d" (ret) : "wa" (l)); return ret; } @@ -37,13 +33,13 @@ p9_minus_1 (void) long l = -1; double ret; - __asm__ ("xxlor %x0,%x1,%x1" : "=&d" (ret) : "wi" (l)); + __asm__ ("xxlor %x0,%x1,%x1" : "=&d" (ret) : "wa" (l)); return ret; } /* { dg-final { scan-assembler {\mxxspltib\M} } } */ -/* { dg-final { scan-assembler-not {\mmtvsrd\M} } } */ +/* { dg-final { scan-assembler-not {\mmtvsr} } } */ /* { dg-final { scan-assembler-not {\mlfd\M} } } */ /* { dg-final { scan-assembler-not {\mld\M} } } */ /* { dg-final { scan-assembler-not {\mlxsd\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-dimode2.c b/gcc/testsuite/gcc.target/powerpc/p9-dimode2.c index dc3c36045e6..c2196a2b586 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-dimode2.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-dimode2.c @@ -1,13 +1,9 @@ -/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mdejagnu-cpu=power9 -O2" } */ -/* Verify that large integer constants are loaded via direct move instead of being - loaded from memory. */ - -#ifndef _ARCH_PPC64 -#error "This code is 64-bit." -#endif +/* Verify that large integer constants are loaded via direct move instead of + being loaded from memory. */ double p9_large (void) @@ -15,12 +11,12 @@ p9_large (void) long l = 0x12345678; double ret; - __asm__ ("xxlor %x0,%x1,%x1" : "=&d" (ret) : "wi" (l)); + __asm__ ("xxlor %x0,%x1,%x1" : "=&d" (ret) : "wa" (l)); return ret; } -/* { dg-final { scan-assembler {\mmtvsrd\M} } } */ +/* { dg-final { scan-assembler {\mmtvsr} } } */ /* { dg-final { scan-assembler-not {\mld\M} } } */ /* { dg-final { scan-assembler-not {\mlfd\M} } } */ /* { dg-final { scan-assembler-not {\mlxsd\M} } } */