From: Luke Kenneth Casson Leighton Date: Thu, 12 Jul 2018 03:52:39 +0000 (+0100) Subject: add slids X-Git-Tag: convert-csv-opcode-to-binary~5055 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=394a22ca09e057e7d3b64a2218e620d1a9aae416;p=libreriscv.git add slids --- diff --git a/shakti/m_class/libre_riscv_chennai_2018.tex b/shakti/m_class/libre_riscv_chennai_2018.tex index b5aae111b..eac12c3d5 100644 --- a/shakti/m_class/libre_riscv_chennai_2018.tex +++ b/shakti/m_class/libre_riscv_chennai_2018.tex @@ -296,8 +296,9 @@ \item Extra RV32 (PicoRV32?) always-on core for wake-up / RTC? \item PLLs are Analog. fun fun fun in the sun sun sun... \end{itemize} - {\it Really need help here. PLLs, Analog stuff: very specific - domain expertise. Fall-back: license proprietary HDL. + {\it Really need help. PLLs, Analog stuff: specific + domain expertise. Fall-back example: + https://www.dolphin-integration.com. } }