From: James Bowman <james.bowman@ftdichip.com>
Date: Tue, 29 Sep 2015 23:47:34 +0000 (+0000)
Subject: sim: ft32: correct simulation of MEMCPY and MEMSET
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=395b0d8a3fdd8915a4897b9b925d56fa42745dcc;p=binutils-gdb.git

sim: ft32: correct simulation of MEMCPY and MEMSET

The MEMCPY and MEMSET instructions should only examine the low 15 bits of
their length arguments.
---

diff --git a/sim/ft32/ChangeLog b/sim/ft32/ChangeLog
index 47218b4e652..f5b14ec15ad 100644
--- a/sim/ft32/ChangeLog
+++ b/sim/ft32/ChangeLog
@@ -1,3 +1,8 @@
+2015-09-29  James Bowman  <james.bowman@ftdichip.com>
+
+	* interp.c (step_once): Correct length for MEMSET and MEMCPY
+	instructions.
+
 2015-09-29  James Bowman  <james.bowman@ftdichip.com>
 
 	* interp.c (cpu_mem_write): Do no write PM when locked.
diff --git a/sim/ft32/interp.c b/sim/ft32/interp.c
index c769ff7a3be..f7daf1c1679 100644
--- a/sim/ft32/interp.c
+++ b/sim/ft32/interp.c
@@ -602,7 +602,7 @@ step_once (SIM_DESC sd)
 	    uint32_t src = r_1v;
 	    uint32_t dst = cpu->state.regs[r_d];
 	    uint32_t i;
-	    for (i = 0; i < rimmv; i++)
+	    for (i = 0; i < (rimmv & 0x7fff); i++)
 	      PUT_BYTE (dst + i, GET_BYTE (src + i));
 	  }
 	  break;
@@ -621,7 +621,7 @@ step_once (SIM_DESC sd)
 	    /* memset instruction.  */
 	    uint32_t dst = cpu->state.regs[r_d];
 	    uint32_t i;
-	    for (i = 0; i < rimmv; i++)
+	    for (i = 0; i < (rimmv & 0x7fff); i++)
 	      PUT_BYTE (dst + i, r_1v);
 	  }
 	  break;