From: Nicolai Hähnle <nicolai.haehnle@amd.com>
Date: Tue, 4 Jul 2017 09:09:50 +0000 (+0200)
Subject: radeonsi/nir: lower uniforms to UBO loads
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3997b10f74aec530eea4a3f64d179a8949c549e6;p=mesa.git

radeonsi/nir: lower uniforms to UBO loads

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
---

diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 31da3a560fd..fce759b003d 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -32,6 +32,12 @@
 #include "compiler/nir_types.h"
 
 
+static int
+type_size(const struct glsl_type *type)
+{
+   return glsl_count_attribute_slots(type, false);
+}
+
 static void scan_instruction(struct tgsi_shader_info *info,
 			     nir_instr *instr)
 {
@@ -345,6 +351,10 @@ si_lower_nir(struct si_shader_selector* sel)
 	 * - ensure constant offsets for texture instructions are folded
 	 *   and copy-propagated
 	 */
+	NIR_PASS_V(sel->nir, nir_lower_io, nir_var_uniform, type_size,
+		   (nir_lower_io_options)0);
+	NIR_PASS_V(sel->nir, nir_lower_uniforms_to_ubo);
+
 	NIR_PASS_V(sel->nir, nir_lower_returns);
 	NIR_PASS_V(sel->nir, nir_lower_vars_to_ssa);
 	NIR_PASS_V(sel->nir, nir_lower_alu_to_scalar);