From: lkcl <lkcl@web>
Date: Sat, 7 May 2022 12:14:10 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2331
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=39c058a6fdab0ea728d5cd1883d87a6a99a99223;p=libreriscv.git

---

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 4966f1e65..211118628 100644
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -433,7 +433,7 @@ sizes: SVP64 does not, as hinted at below.
 
 Additional savings come in the form of `SVREMAP`. This is a hardware
 index transformation system where the normally sequentially-linear
-element access may be "Re-Mapped" to limited but algorithmic-tailored
+Vector element access may be "Re-Mapped" to limited but algorithmic-tailored
 commonly-used deterministic schedules, for example Matrix Multiply,
 DCT, or FFT.  A full in-register-file 5x7 Matrix Multiply or a 3x4 or
 2x6 with optional *in-place* transpose, mirroring or rotation