From: Kazu Hirata <kazu@cs.umass.edu>
Date: Sat, 29 Mar 2003 18:20:23 +0000 (+0000)
Subject: h8300.md (*iorsi3_and_ashift): New.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=39ecf30184809d8ac620e6c6ebf256cafb9b51c0;p=gcc.git

h8300.md (*iorsi3_and_ashift): New.

	* config/h8300/h8300.md (*iorsi3_and_ashift): New.
	(*iorsi3_and_lshiftrt): Likewise.
	(*iorsi3_zero_extract): Likewise.

From-SVN: r65019
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fa5e274aaa9..5e93bc0e445 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2003-03-29  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/h8300/h8300.md (*iorsi3_and_ashift): New.
+	(*iorsi3_and_lshiftrt): Likewise.
+	(*iorsi3_zero_extract): Likewise.
+
 2003-03-29  Kazu Hirata  <kazu@cs.umass.edu>
 
 	* config/h8300/h8300.md (*insv_si_8_8): New.
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 30fa1a9def3..8c8ed6d306d 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -3092,6 +3092,58 @@
   [(set_attr "length" "6")
    (set_attr "cc" "set_znv")])
 
+(define_insn "*iorsi3_and_ashift"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(ior:SI (and:SI (ashift:SI (match_operand:SI 1 "register_operand" "r")
+				   (match_operand:SI 2 "const_int_operand" "n"))
+			(match_operand:SI 3 "single_one_operand" "n"))
+		(match_operand:SI 4 "register_operand" "0")))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && (INTVAL (operands[3]) & ~0xffff) == 0"
+  "*
+{
+  rtx srcpos = GEN_INT (exact_log2 (INTVAL (operands[3]))
+			- INTVAL (operands[2]));
+  rtx dstpos = GEN_INT (exact_log2 (INTVAL (operands[3])));
+  operands[2] = srcpos;
+  operands[3] = dstpos;
+  return \"bld\\t%Z2,%Y1\;bor\\t%Z3,%Y0\;bst\\t%Z3,%Y0\";
+}"
+  [(set_attr "length" "6")
+   (set_attr "cc" "clobber")])
+
+(define_insn "*iorsi3_and_lshiftrt"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(ior:SI (and:SI (lshiftrt:SI (match_operand:SI 1 "register_operand" "r")
+				     (match_operand:SI 2 "const_int_operand" "n"))
+			(match_operand:SI 3 "single_one_operand" "n"))
+		(match_operand:SI 4 "register_operand" "0")))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && ((INTVAL (operands[3]) << INTVAL (operands[2])) & ~0xffff) == 0"
+  "*
+{
+  rtx srcpos = GEN_INT (exact_log2 (INTVAL (operands[3]))
+			+ INTVAL (operands[2]));
+  rtx dstpos = GEN_INT (exact_log2 (INTVAL (operands[3])));
+  operands[2] = srcpos;
+  operands[3] = dstpos;
+  return \"bld\\t%Z2,%Y1\;bor\\t%Z3,%Y0\;bst\\t%Z3,%Y0\";
+}"
+  [(set_attr "length" "6")
+   (set_attr "cc" "clobber")])
+
+(define_insn "*iorsi3_zero_extract"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(ior:SI (zero_extract:SI (match_operand:SI 1 "register_operand" "r")
+				 (const_int 1)
+				 (match_operand:SI 2 "const_int_operand" "n"))
+		(match_operand:SI 3 "register_operand" "0")))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && INTVAL (operands[2]) < 16"
+  "bld\\t%Z2,%Y1\;bor\\t#0,%w0\;bst\\t#0,%w0"
+  [(set_attr "length" "6")
+   (set_attr "cc" "clobber")])
+
 (define_insn "*iorsi3_and_lshiftrt_n_sb"
   [(set (match_operand:SI 0 "register_operand" "=r")
 	(ior:SI (and:SI (lshiftrt:SI (match_operand:SI 1 "register_operand" "r")