From: Luke Kenneth Casson Leighton Date: Mon, 8 Jun 2020 14:59:31 +0000 (+0100) Subject: add CA/CA32 to write regs fields in parser X-Git-Tag: div_pipeline~470 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3a0b0fa5df37c493afc277846f219c84c8cca4ec;p=soc.git add CA/CA32 to write regs fields in parser --- diff --git a/src/soc/decoder/pseudo/parser.py b/src/soc/decoder/pseudo/parser.py index d2466eac..ed63184d 100644 --- a/src/soc/decoder/pseudo/parser.py +++ b/src/soc/decoder/pseudo/parser.py @@ -611,6 +611,8 @@ class PowerParser: name = p[1] if name in self.available_op_fields: self.op_fields.add(name) + if name in ['CA', 'CA32']: + self.write_regs.add(name) if name in ['CR', 'LR', 'CTR', 'TAR', 'FPSCR', 'MSR']: self.special_regs.add(name) self.write_regs.add(name) # and add to list to write