From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 11 Sep 2022 12:53:02 +0000 (+0100)
Subject: clarify prefixing
X-Git-Tag: opf_rfc_ls005_v1~500
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3a0db2583926e893745b13246845acf047715bd8;p=libreriscv.git

clarify prefixing
---

diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn
index 33351a0d9..d7cbe697f 100644
--- a/openpower/sv/rfc/ls001.mdwn
+++ b/openpower/sv/rfc/ls001.mdwn
@@ -52,7 +52,8 @@ Allocation of not just Simple-V but the 80-100 Scalar instructions all
 at the same time*.
 
 It is also critical to note that Simple-V **does not modify the Scalar
-Power ISA in any way** and neither must Vectorised instructions be
+Power ISA**, that **only** Scalar words may be
+Vectorised, and that Vectorised instructions are **not** permitted to be
 different from their Scalar words.
 The sole exception to that is Vectorised
 Branch Conditional, in order to provide the usual Advanced Branching