From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 17:58:04 +0000 (-0500)
Subject: ARM: Add an fp version of one of the microop indexed registers.
X-Git-Tag: stable_2012_02_02~1320
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3a11412c995f462b9fc7eb7b688cb7d7e0011680;p=gem5.git

ARM: Add an fp version of one of the microop indexed registers.
---

diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa
index d80c0c712..84bd81ca0 100644
--- a/src/arch/arm/isa/operands.isa
+++ b/src/arch/arm/isa/operands.isa
@@ -114,6 +114,7 @@ def operands {{
 
     #Register fields for microops
     'Ra' : ('IntReg', 'uw', 'ura', 'IsInteger', 11, maybePCRead, maybePCWrite),
+    'Fa' : ('FloatReg', 'sf', 'ura', 'IsFloating', 11),
     'Rb' : ('IntReg', 'uw', 'urb', 'IsInteger', 12, maybePCRead, maybePCWrite),
 
     #General Purpose Floating Point Reg Operands