From: Kyrylo Tkachov <ktkachov@gcc.gnu.org>
Date: Tue, 19 Dec 2017 16:58:22 +0000 (+0000)
Subject: [arm] PR target/82975: Guard against reg_renumber being NULL in arm.h
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3a3a8086bed05ffc8d24bb6908e4437bd9e982f7;p=gcc.git

[arm] PR target/82975: Guard against reg_renumber being NULL in arm.h

In this bug we ICE when checking REGNO_OK_FOR_INDEX_P on arm during pre-IRA scheduling.
This is because REGNO_OK_FOR_INDEX_P ends up checking the reg_renumber array.
Before IRA reg_renumber is NULL and thus we segfault.

The fix is to guard the use of reg_renumber in the logic in TEST_REGNO in arm.h.
On aarch64, for example, we also guard against the reg_renumber == NULL case.
This fixes the ICE. I also remove the part of the comment that muses on when reg_renumber
is available as with this patch it should now be safe to use at any point.

Bootstrapped and tested on arm-none-linux-gnueabihf.

	PR target/82975
	* config/arm/arm.h (TEST_REGNO): Check reg_renumber is set before
	accessing it.  Adjust comment.

	* gcc.dg/pr82975.c: New test.

From-SVN: r255830
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 31277b9a9f4..76dbd695718 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,10 @@
-2017-12-18  Jakub Jelinek  <jakub@redhat.com>
+2017-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	PR target/82975
+	* config/arm/arm.h (TEST_REGNO): Check reg_renumber is set before
+	accessing it.  Adjust comment.
+
+2017-12-19  Jakub Jelinek  <jakub@redhat.com>
 
 	PR middle-end/81914
 	* predict.c (zero_one_minusone): New function.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index ac51412fe45..a482f0342a9 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1620,7 +1620,8 @@ enum arm_auto_incmodes
    has been allocated, which happens in reginfo.c during register
    allocation.  */
 #define TEST_REGNO(R, TEST, VALUE) \
-  ((R TEST VALUE) || ((unsigned) reg_renumber[R] TEST VALUE))
+  ((R TEST VALUE)	\
+    || (reg_renumber && ((unsigned) reg_renumber[R] TEST VALUE)))
 
 /* Don't allow the pc to be used.  */
 #define ARM_REGNO_OK_FOR_BASE_P(REGNO)			\
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 200a813ca6c..e0eb513f07f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	PR target/82975
+	* gcc.dg/pr82975.c: New test.
+
 2017-12-19  Marek Polacek  <polacek@redhat.com>
 
 	PR c++/83489
diff --git a/gcc/testsuite/gcc.dg/pr82975.c b/gcc/testsuite/gcc.dg/pr82975.c
new file mode 100644
index 00000000000..e6c13bc3b46
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr82975.c
@@ -0,0 +1,19 @@
+/* PR target/82975.  */
+/* { dg-do compile } */
+/* { dg-options "-mtune=cortex-a57 -fno-sched-pressure -O2" } */
+
+typedef __SIZE_TYPE__ size_t;
+
+struct S1
+{
+  char pad1;
+  char val;
+  short pad2;
+};
+
+extern char t[256];
+
+void foo (struct S1 a, size_t i)
+{
+  t[i] = a.val;
+}