From: Uros Bizjak Date: Wed, 7 May 2008 19:08:53 +0000 (+0200) Subject: i386.c (struct_builtin_description): Use CODE_FOR_sse_loadhps_exp. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3a3f9d87f610660d6592fa0f808803c7e51e8d1d;p=gcc.git i386.c (struct_builtin_description): Use CODE_FOR_sse_loadhps_exp. * config/i386/i386.c (struct_builtin_description) [IX86_BUILTIN_LOADHPS]: Use CODE_FOR_sse_loadhps_exp. [IX86_BUILTIN_STOREHPS]: Use CODE_FOR_sse_loadlps_exp. [IX86_BUILTIN_LOADHPD]: Use CODE_FOR_sse2_loadhpd_exp. [IX86_BUILTIN_LOADLPD]: Use CODE_FOR_sse2_loadlpd_exp. [IX86_BUILTIN_MOVHLPS]: Use CODE_FOR_sse_movhlps_exp. [IX86_BUILTIN_MOVLHPS]: Use CODE_FOR_sse_movlhps_exp. [IX86_BUILTIN_UNPCKHPD]: Use FOR_sse2_unpckhpd_exp. [IX86_BUILTIN_UNPCKLPD]: Use FOR_sse2_unpcklpd_exp. From-SVN: r135047 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 441f09edd42..32ee2a6983c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -26,28 +26,20 @@ ix86_fixup_binary_operands_no_copy to handle nonimmediate operands. * config/i386/sse.md - (*sse_movhlps): Rename from sse_movhlps insn pattern. - (sse_movhlps): New expander. Use ix86_fixup_binary_operands + (sse_movhlps_exp): New expander. Use ix86_fixup_binary_operands to handle nonimmediate operands. - (*sse_movlhps): Rename from sse_movlhps insn pattern. - (sse_movlhps): New expander. Use ix86_fixup_binary_operands + (sse_movlhps_exp): New expander. Use ix86_fixup_binary_operands to handle nonimmediate operands. - (*sse_loadhps): Rename from sse_loadhps insn pattern. - (sse_loadhps): New expander. Use ix86_fixup_binary_operands + (sse_loadhps_exp): New expander. Use ix86_fixup_binary_operands to handle nonimmediate operands. - (*sse_loadlps): Rename from sse_loadlps insn pattern. - (sse_loadlps): New expander. Use ix86_fixup_binary_operands + (sse_loadlps_exp): New expander. Use ix86_fixup_binary_operands to handle nonimmediate operands. - (*sse2_unpckhpd): Rename from sse2_unpckhpd insn pattern. - (sse2_unpckhpd): New expander. Use + (sse2_unpckhpd_exp): New expander. Use ix86_fixup_binary_operands_no_copy to handle nonimmediate operands. - (*sse2_unpcklpd): Rename from sse2_unpcklpd insn pattern. - (sse2_unpcklpd): New expander. Use + (sse2_unpcklpd_exp): New expander. Use ix86_fixup_binary_operands_no_copy to handle nonimmediate operands. - (*sse_loadhpd): Rename from sse_loadhpd insn pattern. - (sse_loadhpd): New expander. Use ix86_fixup_binary_operands + (sse_loadhpd_exp): New expander. Use ix86_fixup_binary_operands to handle nonimmediate operands. - (*sse_loadlpd): Rename from sse_loadlpd insn pattern. (sse_loadlpd): New expander. Use ix86_fixup_binary_operands to handle nonimmediate operands. (*sse2_3): Rename from @@ -92,7 +84,16 @@ (ssse3_pmaddubsw128): Use register_operand for operand 1. (ssse3_pmaddubsw): Ditto. - * config/i386/sse.md (ix86_fixup_binary_operands): Assert that src1 + * config/i386/i386.c (struct_builtin_description) + [IX86_BUILTIN_LOADHPS]: Use CODE_FOR_sse_loadhps_exp. + [IX86_BUILTIN_STOREHPS]: Use CODE_FOR_sse_loadlps_exp. + [IX86_BUILTIN_LOADHPD]: Use CODE_FOR_sse2_loadhpd_exp. + [IX86_BUILTIN_LOADLPD]: Use CODE_FOR_sse2_loadlpd_exp. + [IX86_BUILTIN_MOVHLPS]: Use CODE_FOR_sse_movhlps_exp. + [IX86_BUILTIN_MOVLHPS]: Use CODE_FOR_sse_movlhps_exp. + [IX86_BUILTIN_UNPCKHPD]: Use FOR_sse2_unpckhpd_exp. + [IX86_BUILTIN_UNPCKLPD]: Use FOR_sse2_unpcklpd_exp. + (ix86_fixup_binary_operands): Assert that src1 and src2 must have the same mode when swapped. (ix86_expand_binop_builtin): Do not use ix86_fixup_binary_operands and ix86_binary_operator_ok. Do not force operands in registers diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 678e7a567c1..825bf3d3994 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -18158,8 +18158,8 @@ static const struct builtin_description bdesc_special_args[] = { OPTION_MASK_ISA_SSE, CODE_FOR_sse_movntv4sf, "__builtin_ia32_movntps", IX86_BUILTIN_MOVNTPS, UNKNOWN, (int) VOID_FTYPE_PFLOAT_V4SF }, { OPTION_MASK_ISA_SSE, CODE_FOR_sse_movups, "__builtin_ia32_loadups", IX86_BUILTIN_LOADUPS, UNKNOWN, (int) V4SF_FTYPE_PCFLOAT }, - { OPTION_MASK_ISA_SSE, CODE_FOR_sse_loadhps, "__builtin_ia32_loadhps", IX86_BUILTIN_LOADHPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_PCV2SF }, - { OPTION_MASK_ISA_SSE, CODE_FOR_sse_loadlps, "__builtin_ia32_loadlps", IX86_BUILTIN_LOADLPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_PCV2SF }, + { OPTION_MASK_ISA_SSE, CODE_FOR_sse_loadhps_exp, "__builtin_ia32_loadhps", IX86_BUILTIN_LOADHPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_PCV2SF }, + { OPTION_MASK_ISA_SSE, CODE_FOR_sse_loadlps_exp, "__builtin_ia32_loadlps", IX86_BUILTIN_LOADLPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_PCV2SF }, { OPTION_MASK_ISA_SSE, CODE_FOR_sse_storehps, "__builtin_ia32_storehps", IX86_BUILTIN_STOREHPS, UNKNOWN, (int) VOID_FTYPE_PV2SF_V4SF }, { OPTION_MASK_ISA_SSE, CODE_FOR_sse_storelps, "__builtin_ia32_storelps", IX86_BUILTIN_STORELPS, UNKNOWN, (int) VOID_FTYPE_PV2SF_V4SF }, @@ -18178,8 +18178,8 @@ static const struct builtin_description bdesc_special_args[] = { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_movupd, "__builtin_ia32_loadupd", IX86_BUILTIN_LOADUPD, UNKNOWN, (int) V2DF_FTYPE_PCDOUBLE }, { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_movdqu, "__builtin_ia32_loaddqu", IX86_BUILTIN_LOADDQU, UNKNOWN, (int) V16QI_FTYPE_PCCHAR }, - { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_loadhpd, "__builtin_ia32_loadhpd", IX86_BUILTIN_LOADHPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_PCDOUBLE }, - { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_loadlpd, "__builtin_ia32_loadlpd", IX86_BUILTIN_LOADLPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_PCDOUBLE }, + { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_loadhpd_exp, "__builtin_ia32_loadhpd", IX86_BUILTIN_LOADHPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_PCDOUBLE }, + { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_loadlpd_exp, "__builtin_ia32_loadlpd", IX86_BUILTIN_LOADLPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_PCDOUBLE }, /* SSE3 */ { OPTION_MASK_ISA_SSE3, CODE_FOR_sse3_lddqu, "__builtin_ia32_lddqu", IX86_BUILTIN_LDDQU, UNKNOWN, (int) V16QI_FTYPE_PCCHAR }, @@ -18348,8 +18348,8 @@ static const struct builtin_description bdesc_args[] = { OPTION_MASK_ISA_SSE, CODE_FOR_xorv4sf3, "__builtin_ia32_xorps", IX86_BUILTIN_XORPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF }, { OPTION_MASK_ISA_SSE, CODE_FOR_sse_movss, "__builtin_ia32_movss", IX86_BUILTIN_MOVSS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF }, - { OPTION_MASK_ISA_SSE, CODE_FOR_sse_movhlps, "__builtin_ia32_movhlps", IX86_BUILTIN_MOVHLPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF }, - { OPTION_MASK_ISA_SSE, CODE_FOR_sse_movlhps, "__builtin_ia32_movlhps", IX86_BUILTIN_MOVLHPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF }, + { OPTION_MASK_ISA_SSE, CODE_FOR_sse_movhlps_exp, "__builtin_ia32_movhlps", IX86_BUILTIN_MOVHLPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF }, + { OPTION_MASK_ISA_SSE, CODE_FOR_sse_movlhps_exp, "__builtin_ia32_movlhps", IX86_BUILTIN_MOVLHPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF }, { OPTION_MASK_ISA_SSE, CODE_FOR_sse_unpckhps, "__builtin_ia32_unpckhps", IX86_BUILTIN_UNPCKHPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF }, { OPTION_MASK_ISA_SSE, CODE_FOR_sse_unpcklps, "__builtin_ia32_unpcklps", IX86_BUILTIN_UNPCKLPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF }, @@ -18445,8 +18445,8 @@ static const struct builtin_description bdesc_args[] = { OPTION_MASK_ISA_SSE2, CODE_FOR_xorv2df3, "__builtin_ia32_xorpd", IX86_BUILTIN_XORPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF }, { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_movsd, "__builtin_ia32_movsd", IX86_BUILTIN_MOVSD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF }, - { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_unpckhpd, "__builtin_ia32_unpckhpd", IX86_BUILTIN_UNPCKHPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF }, - { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_unpcklpd, "__builtin_ia32_unpcklpd", IX86_BUILTIN_UNPCKLPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF }, + { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_unpckhpd_exp, "__builtin_ia32_unpckhpd", IX86_BUILTIN_UNPCKHPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF }, + { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_unpcklpd_exp, "__builtin_ia32_unpcklpd", IX86_BUILTIN_UNPCKLPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF }, { OPTION_MASK_ISA_SSE2, CODE_FOR_vec_pack_sfix_v2df, "__builtin_ia32_vec_pack_sfix", IX86_BUILTIN_VEC_PACK_SFIX, UNKNOWN, (int) V4SI_FTYPE_V2DF_V2DF }, diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 69e498e2220..d31aceb5d1b 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1992,7 +1992,7 @@ ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(define_expand "sse_movhlps" +(define_expand "sse_movhlps_exp" [(set (match_operand:V4SF 0 "nonimmediate_operand" "") (vec_select:V4SF (vec_concat:V8SF @@ -2005,7 +2005,7 @@ "TARGET_SSE" "ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);") -(define_insn "*sse_movhlps" +(define_insn "sse_movhlps" [(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,m") (vec_select:V4SF (vec_concat:V8SF @@ -2023,7 +2023,7 @@ [(set_attr "type" "ssemov") (set_attr "mode" "V4SF,V2SF,V2SF")]) -(define_expand "sse_movlhps" +(define_expand "sse_movlhps_exp" [(set (match_operand:V4SF 0 "nonimmediate_operand" "") (vec_select:V4SF (vec_concat:V8SF @@ -2036,7 +2036,7 @@ "TARGET_SSE" "ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);") -(define_insn "*sse_movlhps" +(define_insn "sse_movlhps" [(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,o") (vec_select:V4SF (vec_concat:V8SF @@ -2167,7 +2167,7 @@ [(set_attr "type" "ssemov") (set_attr "mode" "V2SF,V4SF,V2SF")]) -(define_expand "sse_loadhps" +(define_expand "sse_loadhps_exp" [(set (match_operand:V4SF 0 "nonimmediate_operand" "") (vec_concat:V4SF (vec_select:V2SF @@ -2177,7 +2177,7 @@ "TARGET_SSE" "ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);") -(define_insn "*sse_loadhps" +(define_insn "sse_loadhps" [(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,o") (vec_concat:V4SF (vec_select:V2SF @@ -2205,7 +2205,7 @@ [(set_attr "type" "ssemov") (set_attr "mode" "V2SF,V4SF,V2SF")]) -(define_expand "sse_loadlps" +(define_expand "sse_loadlps_exp" [(set (match_operand:V4SF 0 "nonimmediate_operand" "") (vec_concat:V4SF (match_operand:V2SF 2 "nonimmediate_operand" "") @@ -2215,7 +2215,7 @@ "TARGET_SSE" "ix86_fixup_binary_operands (UNKNOWN, V4SFmode, operands);") -(define_insn "*sse_loadlps" +(define_insn "sse_loadlps" [(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,m") (vec_concat:V4SF (match_operand:V2SF 2 "nonimmediate_operand" "0,m,x") @@ -2421,7 +2421,7 @@ ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(define_expand "sse2_unpckhpd" +(define_expand "sse2_unpckhpd_exp" [(set (match_operand:V2DF 0 "nonimmediate_operand" "") (vec_select:V2DF (vec_concat:V4DF @@ -2432,7 +2432,7 @@ "TARGET_SSE2" "ix86_fixup_binary_operands (UNKNOWN, V2DFmode, operands);") -(define_insn "*sse2_unpckhpd" +(define_insn "sse2_unpckhpd" [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,m") (vec_select:V2DF (vec_concat:V4DF @@ -2480,7 +2480,7 @@ DONE; }) -(define_expand "sse2_unpcklpd" +(define_expand "sse2_unpcklpd_exp" [(set (match_operand:V2DF 0 "nonimmediate_operand" "") (vec_select:V2DF (vec_concat:V4DF @@ -2491,7 +2491,7 @@ "TARGET_SSE2" "ix86_fixup_binary_operands (UNKNOWN, V2DFmode, operands);") -(define_insn "*sse2_unpcklpd" +(define_insn "sse2_unpcklpd" [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,o") (vec_select:V2DF (vec_concat:V4DF @@ -2595,7 +2595,7 @@ DONE; }) -(define_expand "sse2_loadhpd" +(define_expand "sse2_loadhpd_exp" [(set (match_operand:V2DF 0 "nonimmediate_operand" "") (vec_concat:V2DF (vec_select:DF @@ -2605,7 +2605,7 @@ "TARGET_SSE2" "ix86_fixup_binary_operands (UNKNOWN, V2DFmode, operands);") -(define_insn "*sse2_loadhpd" +(define_insn "sse2_loadhpd" [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,x,o") (vec_concat:V2DF (vec_select:DF @@ -2632,17 +2632,17 @@ operands[0] = adjust_address (operands[0], DFmode, 8); }) -(define_expand "sse2_loadlpd" +(define_expand "sse2_loadlpd_exp" [(set (match_operand:V2DF 0 "nonimmediate_operand" "") (vec_concat:V2DF (match_operand:DF 2 "nonimmediate_operand" "") (vec_select:DF - (match_operand:V2DF 1 "vector_move_operand" "") + (match_operand:V2DF 1 "nonimmediate_operand" "") (parallel [(const_int 1)]))))] "TARGET_SSE2" "ix86_fixup_binary_operands (UNKNOWN, V2DFmode, operands);") -(define_insn "*sse2_loadlpd" +(define_insn "sse2_loadlpd" [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,x,x,x,m") (vec_concat:V2DF (match_operand:DF 2 "nonimmediate_operand" " m,m,x,0,0,x*fr")