From: Roger Sayle Date: Thu, 30 Jul 2020 09:42:06 +0000 (+0200) Subject: nvptx: Define TARGET_TRULY_NOOP_TRUNCATION to false X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3a4a92598014d33ef2c8b8ec38d8ad917812921a;p=gcc.git nvptx: Define TARGET_TRULY_NOOP_TRUNCATION to false Many thanks to Richard Biener for approving the midde-end patch that cleared the way for this one. This nvptx patch defines the target hook TARGET_TRULY_NOOP_TRUNCATION to false, indicating that integer truncations require explicit instructions. nvptx.c already defines TARGET_MODES_TIEABLE_P and TARGET_CAN_CHANGE_MODE_CLASS to false, and as (previously) documented that may require TARGET_TRULY_NOOP_TRUNCATION to be defined likewise. This patch decreases the number of unexpected failures in the testsuite by 10, and increases the number of expected passes by 4, including these previous FAILs/ICEs: gcc.c-torture/compile/opout.c gcc.dg/torture/pr79125.c gcc.dg/tree-ssa/pr92085-1.c Unfortunately there is one testsuite failure that used to pass gcc.target/nvptx/v2si-cvt.c, but this isn't an ICE or incorrect code. This regression has been filed as PR96403, and the failing scan-assembler directives have been replaced by a reference to the PR. This patch has been tested on nvptx-none hosted on x86_64-pc-linux-gnu with "make" and "make check" with fewer ICEs and no wrong code regressions. 2020-07-31 Roger Sayle Tom de Vries gcc/ChangeLog: PR target/90928 * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement. (TARGET_TRULY_NOOP_TRUNCATION): Define. gcc/testsuite/ChangeLog: * gcc.target/nvptx/v2si-cvt.c: Simplify source. Remove scan-assembler directives. Mention PR96403. --- diff --git a/gcc/config/nvptx/nvptx.c b/gcc/config/nvptx/nvptx.c index d2f321fcbcc..d8a8fb2d55b 100644 --- a/gcc/config/nvptx/nvptx.c +++ b/gcc/config/nvptx/nvptx.c @@ -6463,6 +6463,14 @@ nvptx_can_change_mode_class (machine_mode, machine_mode, reg_class_t) return false; } +/* Implement TARGET_TRULY_NOOP_TRUNCATION. */ + +static bool +nvptx_truly_noop_truncation (poly_uint64, poly_uint64) +{ + return false; +} + static GTY(()) tree nvptx_previous_fndecl; static void @@ -6612,6 +6620,9 @@ nvptx_set_current_function (tree fndecl) #undef TARGET_CAN_CHANGE_MODE_CLASS #define TARGET_CAN_CHANGE_MODE_CLASS nvptx_can_change_mode_class +#undef TARGET_TRULY_NOOP_TRUNCATION +#define TARGET_TRULY_NOOP_TRUNCATION nvptx_truly_noop_truncation + #undef TARGET_HAVE_SPECULATION_SAFE_VALUE #define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed diff --git a/gcc/testsuite/gcc.target/nvptx/v2si-cvt.c b/gcc/testsuite/gcc.target/nvptx/v2si-cvt.c index 73f86bcfa9e..35b9fc3ce26 100644 --- a/gcc/testsuite/gcc.target/nvptx/v2si-cvt.c +++ b/gcc/testsuite/gcc.target/nvptx/v2si-cvt.c @@ -3,37 +3,25 @@ typedef int __v2si __attribute__((__vector_size__(8))); -int __attribute__((unused)) +__v2si __attribute__((unused)) vector_cvt (__v2si arg) { - __v2si val4 = arg; - char *p = (char*)&val4; + unsigned short *p = (unsigned short*)&arg; - if (p[0] != 1) - return 1; - if (p[1] != 2) - return 1; - if (p[2] != 3) - return 1; + volatile unsigned short s = p[0]; - return 0; + return arg; } -int -vector_cvt_2 (__v2si val, __v2si val2) +__v2si __attribute__((unused)) +vector_cvt_2 (__v2si arg) { - char *p = (char*)&val; - char *p2 = (char*)&val2; + unsigned char *p = (unsigned char*)&arg; - if (p[0] != p2[0]) - return 1; - if (p[4] != p2[4]) - return 1; + volatile unsigned char s = p[0]; - return 0; + return arg; } -/* We want to test for 'mov.t' here, but given PR80845 we test for cvt.t.t - instead. - { dg-final { scan-assembler "(?n)cvt\\.u32\\.u32.*\\.x" } } */ -/* { dg-final { scan-assembler "(?n)cvt\\.u16\\.u32.*\\.x" } } */ +/* Todo: We'd like to generate insns with .x operands to access the v2si + operands, but that's currently not done, see PR96403. */